[src/netbsd-8]: src/sys/dev Pull up following revision(s) (requested by macal...

[snj <snj%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c7fad4362846
branches:  netbsd-8
changeset: 434545:c7fad4362846
user:      snj <snj%NetBSD.org@localhost>
date:      Sat Jan 13 05:40:25 2018 +0000

description:
Pull up following revision(s) (requested by macallan in ticket #476):
        sys/dev/sbus/dbrivar.h: revision 1.15
        sys/dev/ic/cs4215reg.h: revision 1.5
        sys/dev/sbus/dbri.c: revision 1.37
overhaul the dbri driver and make it work again in the New Order Of Things
- fix switching between control and data mode
- make sure interrupts can happen in control mode
- implement audioif.commit_settings()
- switch to control mode only if needed - for changes in sample rate or format
  but not for things like volume control
should fix PR 52786

diffstat:

 sys/dev/ic/cs4215reg.h |   4 +-
 sys/dev/sbus/dbri.c    |  79 +++++++++++++++++++++++++++++--------------------
 sys/dev/sbus/dbrivar.h |   3 +-
 3 files changed, 50 insertions(+), 36 deletions(-)

diffs (254 lines):

diff -r 292b90f93f7a -r c7fad4362846 sys/dev/ic/cs4215reg.h
--- a/sys/dev/ic/cs4215reg.h    Sat Jan 13 05:38:54 2018 +0000
+++ b/sys/dev/ic/cs4215reg.h    Sat Jan 13 05:40:25 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cs4215reg.h,v 1.4 2008/05/05 00:21:47 jmcneill Exp $   */
+/*     $NetBSD: cs4215reg.h,v 1.4.80.1 2018/01/13 05:40:25 snj Exp $   */
 
 /*
  * Copyright (c) 2001 Jared D. McNeill <jmcneill%NetBSD.org@localhost>
@@ -30,7 +30,7 @@
 /* time slot 1: status register */
 #define        CS4215_CLB      (1<<2)  /* control latch bit */
 #define        CS4215_MLB      (1<<4)  /* 1: mic: 20 dB gain disabled */
-#define        CS4215_RSRVD_1  (1<<5)
+#define        CS4215_ONE      (1<<5)  /* always one */
 
 /* time slot 2: data format register */
 #define        CS4215_DFR_LINEAR16     0
diff -r 292b90f93f7a -r c7fad4362846 sys/dev/sbus/dbri.c
--- a/sys/dev/sbus/dbri.c       Sat Jan 13 05:38:54 2018 +0000
+++ b/sys/dev/sbus/dbri.c       Sat Jan 13 05:40:25 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: dbri.c,v 1.35 2013/10/19 21:00:32 mrg Exp $    */
+/*     $NetBSD: dbri.c,v 1.35.22.1 2018/01/13 05:40:25 snj Exp $       */
 
 /*
  * Copyright (C) 1997 Rudolf Koenig (rfkoenig%immd4.informatik.uni-erlangen.de@localhost)
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dbri.c,v 1.35 2013/10/19 21:00:32 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dbri.c,v 1.35.22.1 2018/01/13 05:40:25 snj Exp $");
 
 #include "audio.h"
 #if NAUDIO > 0
@@ -165,6 +165,7 @@
 static void    dbri_bring_up(struct dbri_softc *);
 static bool    dbri_suspend(device_t, const pmf_qual_t *);
 static bool    dbri_resume(device_t, const pmf_qual_t *);
+static int     dbri_commit(void *);
 
 /* stupid support routines */
 static uint32_t        reverse_bytes(uint32_t, int);
@@ -195,6 +196,7 @@
        .trigger_output         = dbri_trigger_output,
        .trigger_input          = dbri_trigger_input,
        .get_locks              = dbri_get_locks,
+       .commit_settings        = dbri_commit,
 };
 
 CFATTACH_DECL_NEW(dbri, sizeof(struct dbri_softc),
@@ -277,6 +279,8 @@
        sc->sc_dmat = sa->sa_dmatag;
        sc->sc_powerstate = 1;
 
+       sc->sc_whack_codec = 0;
+
        pwr = prom_getpropint(sa->sa_node,"pwr-on-auxio",0);
        aprint_normal(": rev %s\n", ver);
 
@@ -533,6 +537,7 @@
        int n;
 
        dbri_reset(sc);
+       sc->sc_mm.status = 0;
 
        cmd = dbri_command_lock(sc);
 
@@ -548,7 +553,6 @@
                sc->sc_dma->intr[n] = 0;
        }
 
-       /* Disable all SBus bursts */
        /* XXX 16 byte bursts cause errors, the rest works */
        reg = bus_space_read_4(iot, ioh, DBRI_REG0);
 
@@ -698,9 +702,6 @@
        case DBRI_INTR_FXDT:            /* fixed data change */
                DPRINTF("dbri_intr: Fixed data change (%d: %x)\n", channel,
                    val);
-#if 0
-               printf("reg: %08x\n", sc->sc_mm.status);
-#endif
                if (sc->sc_pipe[channel].sdp & DBRI_SDP_MSB)
                        val = reverse_bytes(val, sc->sc_pipe[channel].length);
                if (sc->sc_pipe[channel].prec)
@@ -859,10 +860,12 @@
        pipe_ts_link(sc, 20, PIPEoutput, 16, 32, sc->sc_mm.offset + 32);
        pipe_ts_link(sc, 4, PIPEoutput, 16, data_width, sc->sc_mm.offset);
        pipe_ts_link(sc, 6, PIPEinput, 16, data_width, sc->sc_mm.offset);
+#if 0
+       /* readback for the mixer registers - we don't use that */
        pipe_ts_link(sc, 21, PIPEinput, 16, 32, sc->sc_mm.offset + 32);
 
-       pipe_receive_fixed(sc, 21, &sc->sc_mm.status);
-
+       pipe_receive_fixed(sc, 21, &sc->sc_mm.d.ldata);
+#endif
        mmcodec_setgain(sc, 0);
 
        tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
@@ -879,14 +882,13 @@
        pipe_setup(sc, 4, DBRI_SDP_MEM | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
        pipe_setup(sc, 20, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
        pipe_setup(sc, 6, DBRI_SDP_MEM | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
+#if 0
        pipe_setup(sc, 21, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
-
+#endif
        pipe_setup(sc, 17, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
        pipe_setup(sc, 18, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
        pipe_setup(sc, 19, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
 
-       sc->sc_mm.status = 0;
-
        pipe_receive_fixed(sc, 18, &sc->sc_mm.status);
        pipe_receive_fixed(sc, 19, &sc->sc_mm.version);
 
@@ -925,7 +927,7 @@
         * 2: serial enable, CHI master, 128 bits per frame, clock 1
         * 3: tests disabled
         */
-       mm->c.bcontrol[0] = CS4215_RSRVD_1 | CS4215_MLB;
+       mm->c.bcontrol[0] = CS4215_ONE | CS4215_MLB;
        mm->c.bcontrol[1] = CS4215_DFR_ULAW | CS4215_FREQ[0].csval;
        mm->c.bcontrol[2] = CS4215_XCLK | CS4215_BSEL_128 | CS4215_FREQ[0].xtal;
        mm->c.bcontrol[3] = 0;
@@ -982,6 +984,10 @@
        mmcodec_setgain(sc, 1);
        delay(125);
 
+       tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
+       tmp &= ~(DBRI_CHI_ACTIVATE);    /* disable CHI */
+       bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
+
        bus_space_write_4(iot, ioh, DBRI_REG2, 0);
        delay(125);
 
@@ -992,7 +998,6 @@
        val |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);
 
        bus_space_write_4(iot, ioh, DBRI_REG2, val);
-
        delay(34);
 
        /*
@@ -1013,6 +1018,8 @@
        pipe_ts_link(sc, 18, PIPEinput, 16, 8, sc->sc_mm.offset);
        pipe_ts_link(sc, 19, PIPEinput, 16, 8, sc->sc_mm.offset + 48);
 
+       pipe_receive_fixed(sc, 18, &sc->sc_mm.status);
+
        /* wait for the chip to echo back CLB as zero */
        sc->sc_mm.c.bcontrol[0] &= ~CS4215_CLB;
        pipe_transmit_fixed(sc, 17, sc->sc_mm.c.lcontrol);
@@ -1058,7 +1065,7 @@
 
        mmcodec_setgain(sc, 0);
 
-       return (0);
+       return ret;
 
 }
 
@@ -1731,7 +1738,7 @@
                sc->sc_mm.c.bcontrol[1] |= CS4215_DFR_STEREO;
                break;
        }
-
+       sc->sc_whack_codec = 1;
        return (0);
 }
 
@@ -1975,6 +1982,30 @@
 }
 
 static int
+dbri_commit(void *hdl)
+{
+       struct dbri_softc *sc = hdl;
+       int ret = 0;
+
+       /*
+        * we only need to whack the codec if things like sample format or
+        * frequency changed, not for mixer stuff
+        */
+       if (sc->sc_whack_codec == 0)
+               return 0;
+
+       ret = mmcodec_setcontrol(sc);
+       if (ret) {
+               DPRINTF("%s: control mode failed. Mutex %s PIL %x\n", __func__,
+                   mutex_owned(&sc->sc_intr_lock) ? "held" : "free",
+                   (getpsr() & PSR_PIL) >> 8);
+       } else
+               DPRINTF("%s: control mode ok\n", __func__);
+       mmcodec_init_data(sc);
+       return 0;
+}
+
+static int
 dbri_trigger_output(void *hdl, void *start, void *end, int blksize,
                    void (*intr)(void *), void *intrarg,
                    const struct audio_params *param)
@@ -1994,13 +2025,6 @@
 
        sc->sc_params = *param;
 
-       if (sc->sc_recording == 0) {
-               /* do not muck with the codec when it's already in use */
-               if (mmcodec_setcontrol(sc) != 0)
-                       return -1;
-               mmcodec_init_data(sc);
-       }
-
        /*
         * always use DMA descriptor 0 for output
         * no need to allocate them dynamically since we only ever have 
@@ -2044,17 +2068,6 @@
 
        sc->sc_params = *param;
 
-       if (sc->sc_playing == 0) {
-
-               /*
-                * we don't support different parameters for playing and
-                * recording anyway so don't bother whacking the codec if
-                * it's already set up
-                */
-               mmcodec_setcontrol(sc);
-               mmcodec_init_data(sc);
-       }
-
        sc->sc_recording = 1;
        setup_ring_recv(sc, 6, 1, num, blksize, intr, intrarg);
        return 0;
diff -r 292b90f93f7a -r c7fad4362846 sys/dev/sbus/dbrivar.h
--- a/sys/dev/sbus/dbrivar.h    Sat Jan 13 05:38:54 2018 +0000
+++ b/sys/dev/sbus/dbrivar.h    Sat Jan 13 05:40:25 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: dbrivar.h,v 1.13 2011/11/23 23:07:36 jmcneill Exp $    */
+/*     $NetBSD: dbrivar.h,v 1.13.42.1 2018/01/13 05:40:25 snj Exp $    */
 
 /*
  * Copyright (C) 1997 Rudolf Koenig (rfkoenig%immd4.informatik.uni-erlangen.de@localhost)
@@ -153,6 +153,7 @@
        int             sc_linp, sc_rinp;       /* input volume */
        int             sc_monitor;             /* monitor volume */
        int             sc_input;               /* 0 - line, 1 - mic */
+       int             sc_whack_codec;  /* 1 - codec needs control mode */
 
        int             sc_ctl_mode;