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[src/netbsd-8]: src/sys/arch/x68k/dev Pull up following revision(s) (requeste...
details: https://anonhg.NetBSD.org/src/rev/1af372ddb941
branches: netbsd-8
changeset: 434316:1af372ddb941
user: snj <snj%NetBSD.org@localhost>
date: Sat Sep 23 17:55:13 2017 +0000
description:
Pull up following revision(s) (requested by isaki in ticket #290):
sys/arch/x68k/dev/dmacvar.h: revision 1.11-1.12 via patch
sys/arch/x68k/dev/intio_dmac.c: revision 1.36-1.37 via patch
sys/arch/x68k/dev/fd.c: revision 1.120 via patch
sys/arch/x68k/dev/vs.c: revision 1.45-1.46 via patch
Use dmac_prepare_xfer().
>From Y.Sugahara.
--
Allow dmac_alloc_channel() to specify DCR and OCR.
FDC uses 'Cycle Steal Mode with Hold' but ADPCM
should use 'Cycle Steal Mode without Hold' on x68k.
>From Y.Suhagara and it was found by XM6i.
--
Fix a Continue Operation.
Patch from Y.Sugahara.
diffstat:
sys/arch/x68k/dev/dmacvar.h | 15 +++++++-----
sys/arch/x68k/dev/fd.c | 9 +++++--
sys/arch/x68k/dev/intio_dmac.c | 49 ++++++++++++++++++------------------------
sys/arch/x68k/dev/vs.c | 43 +++++++++++++++---------------------
4 files changed, 54 insertions(+), 62 deletions(-)
diffs (291 lines):
diff -r a1511feafe9d -r 1af372ddb941 sys/arch/x68k/dev/dmacvar.h
--- a/sys/arch/x68k/dev/dmacvar.h Sat Sep 23 17:50:43 2017 +0000
+++ b/sys/arch/x68k/dev/dmacvar.h Sat Sep 23 17:55:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dmacvar.h,v 1.10 2008/06/25 13:30:24 isaki Exp $ */
+/* $NetBSD: dmacvar.h,v 1.10.76.1 2017/09/23 17:55:13 snj Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -55,8 +55,6 @@
struct dmac_sg_array *dx_array; /* DMAC array chain */
int dx_done;
#endif
- int dx_nextoff; /* for continued operation */
- int dx_nextsize;
};
/*
@@ -99,9 +97,14 @@
#define DMAC_MAXSEGSZ 0xff00
#define DMAC_BOUNDARY 0
-struct dmac_channel_stat *dmac_alloc_channel(device_t, int, const char *,
- int, dmac_intr_handler_t, void *, int, dmac_intr_handler_t, void *);
- /* ch, name, normalv, normal, errorv, error */
+struct dmac_channel_stat *dmac_alloc_channel(device_t,
+ int, /* ch */
+ const char *, /* name */
+ int, dmac_intr_handler_t, void *, /* normal handler */
+ int, dmac_intr_handler_t, void *, /* error handler */
+ uint8_t, /* dcr */
+ uint8_t /* ocr */
+);
int dmac_free_channel(device_t, int, void *);
/* ch, channel */
struct dmac_dma_xfer *dmac_alloc_xfer(struct dmac_channel_stat *,
diff -r a1511feafe9d -r 1af372ddb941 sys/arch/x68k/dev/fd.c
--- a/sys/arch/x68k/dev/fd.c Sat Sep 23 17:50:43 2017 +0000
+++ b/sys/arch/x68k/dev/fd.c Sat Sep 23 17:55:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fd.c,v 1.119 2017/01/12 14:24:53 isaki Exp $ */
+/* $NetBSD: fd.c,v 1.119.8.1 2017/09/23 17:55:13 snj Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.119 2017/01/12 14:24:53 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.119.8.1 2017/09/23 17:55:13 snj Exp $");
#include "opt_ddb.h"
#include "opt_m68k_arch.h"
@@ -487,7 +487,10 @@
/* Initialize DMAC channel */
fdc->sc_dmachan = dmac_alloc_channel(parent, ia->ia_dma, "fdc",
ia->ia_dmaintr, fdcdmaintr, fdc,
- ia->ia_dmaintr + 1, fdcdmaerrintr, fdc);
+ ia->ia_dmaintr + 1, fdcdmaerrintr, fdc,
+ (DMAC_DCR_XRM_CSWH | DMAC_DCR_OTYP_EASYNC | DMAC_DCR_OPS_8BIT),
+ (DMAC_OCR_SIZE_BYTE | DMAC_OCR_REQG_EXTERNAL));
+
if (bus_dmamap_create(fdc->sc_dmat, FDC_MAXIOSIZE, 1, DMAC_MAXSEGSZ,
0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &fdc->sc_dmamap)) {
aprint_error_dev(self, "can't set up intio DMA map\n");
diff -r a1511feafe9d -r 1af372ddb941 sys/arch/x68k/dev/intio_dmac.c
--- a/sys/arch/x68k/dev/intio_dmac.c Sat Sep 23 17:50:43 2017 +0000
+++ b/sys/arch/x68k/dev/intio_dmac.c Sat Sep 23 17:55:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intio_dmac.c,v 1.35 2014/03/26 08:17:59 christos Exp $ */
+/* $NetBSD: intio_dmac.c,v 1.35.22.1 2017/09/23 17:55:13 snj Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include "opt_m68k_arch.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intio_dmac.c,v 1.35 2014/03/26 08:17:59 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intio_dmac.c,v 1.35.22.1 2017/09/23 17:55:13 snj Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -159,9 +159,10 @@
* Channel initialization/deinitialization per user device.
*/
struct dmac_channel_stat *
-dmac_alloc_channel(device_t self, int ch, const char *name, int normalv,
- dmac_intr_handler_t normal, void *normalarg, int errorv,
- dmac_intr_handler_t error, void *errorarg)
+dmac_alloc_channel(device_t self, int ch, const char *name,
+ int normalv, dmac_intr_handler_t normal, void *normalarg,
+ int errorv, dmac_intr_handler_t error, void *errorarg,
+ uint8_t dcr, uint8_t ocr)
{
struct intio_softc *intio = device_private(self);
struct dmac_softc *dmac = device_private(intio->sc_dmac);
@@ -201,9 +202,8 @@
/* fill the channel status structure by the default values. */
strcpy(chan->ch_name, name);
- chan->ch_dcr = (DMAC_DCR_XRM_CSWH | DMAC_DCR_OTYP_EASYNC |
- DMAC_DCR_OPS_8BIT);
- chan->ch_ocr = (DMAC_OCR_SIZE_BYTE | DMAC_OCR_REQG_EXTERNAL);
+ chan->ch_dcr = dcr;
+ chan->ch_ocr = ocr;
chan->ch_normalv = normalv;
chan->ch_errorv = errorv;
chan->ch_normal = normal;
@@ -217,6 +217,7 @@
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
DMAC_REG_DCR, chan->ch_dcr);
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CPR, 0);
+ /* OCR will be written at dmac_load_xfer() */
/*
* X68k physical user space is a subset of the kernel space;
@@ -283,7 +284,6 @@
xf->dx_array = chan->ch_map;
xf->dx_done = 0;
#endif
- xf->dx_nextoff = xf->dx_nextsize = -1;
return xf;
}
@@ -299,8 +299,6 @@
xf->dx_ocr |= DMAC_OCR_CHAIN_DISABLED;
else {
xf->dx_ocr |= DMAC_OCR_CHAIN_ARRAY;
- xf->dx_nextoff = ~0;
- xf->dx_nextsize = ~0;
}
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
@@ -351,6 +349,8 @@
struct dmac_channel_stat *chan = xf->dx_channel;
struct x68k_bus_dmamap *dmamap = xf->dx_dmamap;
int go = DMAC_CCR_STR|DMAC_CCR_INT;
+ bus_addr_t paddr;
+ uint8_t csr;
#ifdef DMAC_ARRAYCHAIN
int c;
#endif
@@ -390,20 +390,21 @@
if (dmamap->dm_mapsize != dmamap->dm_segs[0].ds_len)
panic("dmac_start_xfer_offset: dmamap curruption");
#endif
- if (offset == xf->dx_nextoff &&
- size == xf->dx_nextsize) {
- /* Use continued operation */
+ paddr = dmamap->dm_segs[0].ds_addr + offset;
+ csr = bus_space_read_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR);
+ if ((csr & DMAC_CSR_ACT) != 0) {
+ /* Use 'Continue Mode' */
+ bus_space_write_4(dmac->sc_bst, chan->ch_bht,
+ DMAC_REG_BAR, paddr);
+ bus_space_write_2(dmac->sc_bst, chan->ch_bht,
+ DMAC_REG_BTCR, (int) size);
go |= DMAC_CCR_CNT;
- xf->dx_nextoff += size;
+ go &= ~DMAC_CCR_STR;
} else {
bus_space_write_4(dmac->sc_bst, chan->ch_bht,
- DMAC_REG_MAR,
- (int) dmamap->dm_segs[0].ds_addr
- + offset);
+ DMAC_REG_MAR, paddr);
bus_space_write_2(dmac->sc_bst, chan->ch_bht,
DMAC_REG_MTCR, (int) size);
- xf->dx_nextoff = offset;
- xf->dx_nextsize = size;
}
#ifdef DMAC_ARRAYCHAIN
xf->dx_done = 1;
@@ -435,13 +436,6 @@
#endif
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CCR, go);
- if (xf->dx_nextoff != ~0) {
- bus_space_write_4(dmac->sc_bst, chan->ch_bht,
- DMAC_REG_BAR, xf->dx_nextoff);
- bus_space_write_2(dmac->sc_bst, chan->ch_bht,
- DMAC_REG_BTCR, xf->dx_nextsize);
- }
-
return 0;
}
@@ -562,7 +556,6 @@
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CCR,
DMAC_CCR_INT | DMAC_CCR_SAB);
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
- xf->dx_nextoff = xf->dx_nextsize = -1;
return 0;
}
diff -r a1511feafe9d -r 1af372ddb941 sys/arch/x68k/dev/vs.c
--- a/sys/arch/x68k/dev/vs.c Sat Sep 23 17:50:43 2017 +0000
+++ b/sys/arch/x68k/dev/vs.c Sat Sep 23 17:55:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vs.c,v 1.37 2017/06/01 02:45:08 chs Exp $ */
+/* $NetBSD: vs.c,v 1.37.2.1 2017/09/23 17:55:13 snj Exp $ */
/*
* Copyright (c) 2001 Tetsuya Isaki. All rights reserved.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: vs.c,v 1.37 2017/06/01 02:45:08 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vs.c,v 1.37.2.1 2017/09/23 17:55:13 snj Exp $");
#include "audio.h"
#include "vs.h"
@@ -243,7 +243,9 @@
sc->sc_dmat = ia->ia_dmat;
sc->sc_dma_ch = dmac_alloc_channel(parent, ia->ia_dma, "vs",
ia->ia_dmaintr, vs_dmaintr, sc,
- ia->ia_dmaintr+1, vs_dmaerrintr, sc);
+ ia->ia_dmaintr+1, vs_dmaerrintr, sc,
+ (DMAC_DCR_XRM_CSWOH | DMAC_DCR_OTYP_EASYNC | DMAC_DCR_OPS_8BIT),
+ (DMAC_OCR_SIZE_BYTE | DMAC_OCR_REQG_EXTERNAL));
aprint_normal_dev(self, "MSM6258V ADPCM voice synthesizer\n");
@@ -504,7 +506,6 @@
{
struct vs_softc *sc;
struct vs_dma *vd;
- struct dmac_dma_xfer *xf;
struct dmac_channel_stat *chan;
DPRINTF(2, ("vs_trigger_output: start=%p, bsize=%d, intr=%p, arg=%p\n",
@@ -530,17 +531,13 @@
vs_set_sr(sc, sc->sc_current.prate);
vs_set_po(sc, VS_PANOUT_LR);
- xf = dmac_alloc_xfer(chan, sc->sc_dmat, vd->vd_map);
- sc->sc_current.xfer = xf;
- chan->ch_dcr = (DMAC_DCR_XRM_CSWOH | DMAC_DCR_OTYP_EASYNC |
- DMAC_DCR_OPS_8BIT);
- chan->ch_ocr = DMAC_OCR_REQG_EXTERNAL;
- xf->dx_ocr = DMAC_OCR_DIR_MTD;
- xf->dx_scr = DMAC_SCR_MAC_COUNT_UP | DMAC_SCR_DAC_NO_COUNT;
- xf->dx_device = sc->sc_addr + MSM6258_DATA*2 + 1;
+ sc->sc_current.xfer = dmac_prepare_xfer(chan, sc->sc_dmat, vd->vd_map,
+ DMAC_OCR_DIR_MTD,
+ (DMAC_SCR_MAC_COUNT_UP | DMAC_SCR_DAC_NO_COUNT),
+ sc->sc_addr + MSM6258_DATA * 2 + 1);
- dmac_load_xfer(chan->ch_softc, xf);
- dmac_start_xfer_offset(chan->ch_softc, xf, 0, sc->sc_current.blksize);
+ dmac_start_xfer_offset(chan->ch_softc, sc->sc_current.xfer, 0,
+ sc->sc_current.blksize);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, MSM6258_STAT, 2);
return 0;
@@ -553,7 +550,6 @@
{
struct vs_softc *sc;
struct vs_dma *vd;
- struct dmac_dma_xfer *xf;
struct dmac_channel_stat *chan;
DPRINTF(2, ("vs_trigger_input: start=%p, bsize=%d, intr=%p, arg=%p\n",
@@ -577,17 +573,14 @@
}
vs_set_sr(sc, sc->sc_current.rrate);
- xf = dmac_alloc_xfer(chan, sc->sc_dmat, vd->vd_map);
- sc->sc_current.xfer = xf;
- chan->ch_dcr = (DMAC_DCR_XRM_CSWOH | DMAC_DCR_OTYP_EASYNC |
- DMAC_DCR_OPS_8BIT);
- chan->ch_ocr = DMAC_OCR_REQG_EXTERNAL;
- xf->dx_ocr = DMAC_OCR_DIR_DTM;
- xf->dx_scr = DMAC_SCR_MAC_COUNT_UP | DMAC_SCR_DAC_NO_COUNT;
- xf->dx_device = sc->sc_addr + MSM6258_DATA*2 + 1;
- dmac_load_xfer(chan->ch_softc, xf);
- dmac_start_xfer_offset(chan->ch_softc, xf, 0, sc->sc_current.blksize);
+ sc->sc_current.xfer = dmac_prepare_xfer(chan, sc->sc_dmat, vd->vd_map,
+ DMAC_OCR_DIR_DTM,
+ (DMAC_SCR_MAC_COUNT_UP | DMAC_SCR_DAC_NO_COUNT),
+ sc->sc_addr + MSM6258_DATA * 2 + 1);
+
+ dmac_start_xfer_offset(chan->ch_softc, sc->sc_current.xfer, 0,
+ sc->sc_current.blksize);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, MSM6258_STAT, 4);
return 0;
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