[src/trunk]: src/sys/arch/aarch64/include Restore ICC_SRE_EL2 registers lost ...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/77103823e07b
branches:  trunk
changeset: 365252:77103823e07b
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Thu Aug 09 10:27:17 2018 +0000

description:
Restore ICC_SRE_EL2 registers lost in previous commit

diffstat:

 sys/arch/aarch64/include/armreg.h |  8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diffs (22 lines):

diff -r 3312d7ed10b7 -r 77103823e07b sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Thu Aug 09 08:43:56 2018 +0000
+++ b/sys/arch/aarch64/include/armreg.h Thu Aug 09 10:27:17 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.15 2018/08/08 19:00:53 jmcneill Exp $ */
+/* $NetBSD: armreg.h,v 1.16 2018/08/09 10:27:17 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -976,6 +976,12 @@
 #define        ICC_SRE_EL1_DFB         __BIT(1)
 #define        ICC_SRE_EL1_SRE         __BIT(0)
 
+// ICC_SRE_EL2: Interrupt Controller System Register Enable register
+#define        ICC_SRE_EL2_EN          __BIT(3)
+#define        ICC_SRE_EL2_DIB         __BIT(2)
+#define        ICC_SRE_EL2_DFB         __BIT(1)
+#define        ICC_SRE_EL2_SRE         __BIT(0)
+
 // ICC_BPR[01]_EL1: Interrupt Controller Binary Point Register 0/1
 #define        ICC_BPR_EL1_BinaryPoint __BITS(2,0)