[src/trunk]: src/sys/arch/arm/nvidia Add more Tegra124 XUSB PADCTL register b...

[jakllsch <jakllsch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/14a37ac62da3
branches:  trunk
changeset: 356405:14a37ac62da3
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Fri Sep 22 20:23:22 2017 +0000

description:
Add more Tegra124 XUSB PADCTL register bits.

diffstat:

 sys/arch/arm/nvidia/tegra124_xusbpadreg.h |  19 ++++++++++++++++++-
 1 files changed, 18 insertions(+), 1 deletions(-)

diffs (33 lines):

diff -r 2c060fa1417e -r 14a37ac62da3 sys/arch/arm/nvidia/tegra124_xusbpadreg.h
--- a/sys/arch/arm/nvidia/tegra124_xusbpadreg.h Fri Sep 22 19:11:47 2017 +0000
+++ b/sys/arch/arm/nvidia/tegra124_xusbpadreg.h Fri Sep 22 20:23:22 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra124_xusbpadreg.h,v 1.2 2017/09/22 19:11:47 jakllsch Exp $ */
+/* $NetBSD: tegra124_xusbpadreg.h,v 1.3 2017/09/22 20:23:22 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -118,6 +118,23 @@
 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL5_REG         0x158
 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL6_REG         0x15c
 
+#define XUSB_PADCTL_OC_DET_OC_DETECTED_VBUS_PAD2               __BIT(22)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED_VBUS_PAD1               __BIT(21)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED_VBUS_PAD0               __BIT(20)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED3                                __BIT(19)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED2                                __BIT(18)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED1                                __BIT(17)
+#define XUSB_PADCTL_OC_DET_OC_DETECTED0                                __BIT(16)
+#define XUSB_PADCTL_OC_DET_VBUS_ENABLE1                                __BIT(9)
+#define XUSB_PADCTL_OC_DET_VBUS_ENABLE0                                __BIT(8)
+#define XUSB_PADCTL_OC_DET_VBUS_ENABLE2                                __BIT(4)
+
+#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN                __BIT(26)
+#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY    __BIT(25)
+#define XUSB_PADCTL_ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN          __BIT(24)
+#define XUSB_PADCTL_ELPG_PROGRAM_SSP1_ELPG_VCORE_DOWN          __BIT(22)
+#define XUSB_PADCTL_ELPG_PROGRAM_SSP1_ELPG_CLAMP_EN_EARLY      __BIT(21)
+#define XUSB_PADCTL_ELPG_PROGRAM_SSP1_ELPG_CLAMP_EN            __BIT(20)
 #define XUSB_PADCTL_ELPG_PROGRAM_SSP0_ELPG_VCORE_DOWN          __BIT(18)
 #define XUSB_PADCTL_ELPG_PROGRAM_SSP0_ELPG_CLAMP_EN_EARLY      __BIT(17)
 #define XUSB_PADCTL_ELPG_PROGRAM_SSP0_ELPG_CLAMP_EN            __BIT(16)