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[src/trunk]: src/sys/arch Add H3 MMC support
details: https://anonhg.NetBSD.org/src/rev/b79ba012c617
branches: trunk
changeset: 354772:b79ba012c617
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Jun 29 09:26:06 2017 +0000
description:
Add H3 MMC support
diffstat:
sys/arch/arm/sunxi/files.sunxi | 10 +-
sys/arch/arm/sunxi/sun8i_h3_ccu.c | 47 +-
sys/arch/arm/sunxi/sunxi_ccu.c | 10 +-
sys/arch/arm/sunxi/sunxi_ccu.h | 97 +++-
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c | 117 ++++
sys/arch/arm/sunxi/sunxi_ccu_nm.c | 112 ++++-
sys/arch/arm/sunxi/sunxi_ccu_prediv.c | 127 +++++
sys/arch/arm/sunxi/sunxi_mmc.c | 857 ++++++++++++++++++++++++++++++++++
sys/arch/arm/sunxi/sunxi_mmc.h | 179 +++++++
sys/arch/evbarm/conf/SUNXI | 16 +-
10 files changed, 1549 insertions(+), 23 deletions(-)
diffs (truncated from 1781 to 300 lines):
diff -r 5117512cc207 -r b79ba012c617 sys/arch/arm/sunxi/files.sunxi
--- a/sys/arch/arm/sunxi/files.sunxi Thu Jun 29 08:51:27 2017 +0000
+++ b/sys/arch/arm/sunxi/files.sunxi Thu Jun 29 09:26:06 2017 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.sunxi,v 1.1 2017/06/28 23:51:29 jmcneill Exp $
+# $NetBSD: files.sunxi,v 1.2 2017/06/29 09:26:06 jmcneill Exp $
#
# Configuration info for Allwinner sunxi family SoCs
#
@@ -22,7 +22,10 @@
file arch/arm/sunxi/sunxi_ccu.c sunxi_ccu
file arch/arm/sunxi/sunxi_ccu_gate.c sunxi_ccu
file arch/arm/sunxi/sunxi_ccu_nm.c sunxi_ccu
+file arch/arm/sunxi/sunxi_ccu_nkmp.c sunxi_ccu
+file arch/arm/sunxi/sunxi_ccu_prediv.c sunxi_ccu
+# CCU (H3)
device sun8ih3ccu: sunxi_ccu
attach sun8ih3ccu at fdt with sunxi_h3_ccu
file arch/arm/sunxi/sun8i_h3_ccu.c sunxi_h3_ccu
@@ -31,6 +34,11 @@
attach com at fdt with sunxi_com
file arch/arm/sunxi/sunxi_com.c sunxi_com needs-flag
+# SD/MMC
+device sunximmc: sdmmcbus
+attach sunximmc at fdt with sunxi_mmc
+file arch/arm/sunxi/sunxi_mmc.c sunxi_mmc
+
# SOC parameters
defflag opt_soc.h SOC_SUNXI
defflag opt_soc.h SOC_SUN8I: SOC_SUNXI
diff -r 5117512cc207 -r b79ba012c617 sys/arch/arm/sunxi/sun8i_h3_ccu.c
--- a/sys/arch/arm/sunxi/sun8i_h3_ccu.c Thu Jun 29 08:51:27 2017 +0000
+++ b/sys/arch/arm/sunxi/sun8i_h3_ccu.c Thu Jun 29 09:26:06 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_h3_ccu.c,v 1.1 2017/06/28 23:51:29 jmcneill Exp $ */
+/* $NetBSD: sun8i_h3_ccu.c,v 1.2 2017/06/29 09:26:06 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.1 2017/06/28 23:51:29 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.2 2017/06/29 09:26:06 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -49,8 +49,14 @@
#define BUS_SOFT_RST_REG3 0x2d0
#define BUS_SOFT_RST_REG4 0x2d8
+#define PLL_PERIPH0_CTRL_REG 0x028
+#define AHB1_APB1_CFG_REG 0x054
#define APB2_CFG_REG 0x058
+#define BUS_CLK_GATING_REG0 0x060
#define BUS_CLK_GATING_REG3 0x06c
+#define SDMMC0_CLK_REG 0x088
+#define SDMMC1_CLK_REG 0x08c
+#define SDMMC2_CLK_REG 0x090
static int sun8i_h3_ccu_match(device_t, cfdata_t, void *);
static void sun8i_h3_ccu_attach(device_t, device_t, void *);
@@ -126,13 +132,48 @@
SUNXI_CCU_RESET(H3_RST_BUS_SCR, BUS_SOFT_RST_REG4, 20),
};
+static const char *ahb1_parents[] = { "losc", "hosc", "axi", "pll_periph0" };
static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
+static const char *mod_parents[] = { "hosc", "pll_periph0", "pll_periph1" };
static struct sunxi_ccu_clk sun8i_h3_ccu_clks[] = {
+ SUNXI_CCU_NKMP(H3_CLK_PLL_PERIPH0, "pll_periph0", "hosc",
+ PLL_PERIPH0_CTRL_REG, __BITS(12,8), __BITS(5,3), 0, __BITS(17,16), __BIT(31),
+ 0),
+
+ SUNXI_CCU_PREDIV(H3_CLK_AHB1, "ahb1", ahb1_parents,
+ AHB1_APB1_CFG_REG, /* reg */
+ __BITS(7,6), /* prediv */
+ __BIT(3), /* prediv_sel */
+ __BITS(5,4), /* div */
+ __BITS(13,12), /* sel */
+ SUNXI_CCU_PREDIV_POWER_OF_TWO),
+
SUNXI_CCU_NM(H3_CLK_APB2, "apb2", apb2_parents,
- APB2_CFG_REG, __BITS(17,16), __BITS(4,0), __BITS(25,24),
+ APB2_CFG_REG, /* reg */
+ __BITS(17,16), /* n */
+ __BITS(4,0), /* m */
+ __BITS(25,24), /* sel */
+ 0, /* enable */
SUNXI_CCU_NM_POWER_OF_TWO),
+ SUNXI_CCU_NM(H3_CLK_MMC0, "mmc0", mod_parents,
+ SDMMC0_CLK_REG, __BITS(17, 16), __BITS(3,0), __BITS(25, 24), __BIT(31),
+ SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+ SUNXI_CCU_NM(H3_CLK_MMC1, "mmc1", mod_parents,
+ SDMMC1_CLK_REG, __BITS(17, 16), __BITS(3,0), __BITS(25, 24), __BIT(31),
+ SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+ SUNXI_CCU_NM(H3_CLK_MMC2, "mmc2", mod_parents,
+ SDMMC2_CLK_REG, __BITS(17, 16), __BITS(3,0), __BITS(25, 24), __BIT(31),
+ SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+
+ SUNXI_CCU_GATE(H3_CLK_BUS_MMC0, "bus-mmc0", "ahb1",
+ BUS_CLK_GATING_REG0, 8),
+ SUNXI_CCU_GATE(H3_CLK_BUS_MMC1, "bus-mmc1", "ahb1",
+ BUS_CLK_GATING_REG0, 9),
+ SUNXI_CCU_GATE(H3_CLK_BUS_MMC2, "bus-mmc2", "ahb1",
+ BUS_CLK_GATING_REG0, 10),
+
SUNXI_CCU_GATE(H3_CLK_BUS_UART0, "bus-uart0", "apb2",
BUS_CLK_GATING_REG3, 19),
};
diff -r 5117512cc207 -r b79ba012c617 sys/arch/arm/sunxi/sunxi_ccu.c
--- a/sys/arch/arm/sunxi/sunxi_ccu.c Thu Jun 29 08:51:27 2017 +0000
+++ b/sys/arch/arm/sunxi/sunxi_ccu.c Thu Jun 29 09:26:06 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_ccu.c,v 1.1 2017/06/28 23:51:29 jmcneill Exp $ */
+/* $NetBSD: sunxi_ccu.c,v 1.2 2017/06/29 09:26:06 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
#include "opt_fdt_arm.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_ccu.c,v 1.1 2017/06/28 23:51:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_ccu.c,v 1.2 2017/06/29 09:26:06 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -326,13 +326,15 @@
switch (clk->type) {
case SUNXI_CCU_GATE: type = "gate"; break;
case SUNXI_CCU_NM: type = "nm"; break;
+ case SUNXI_CCU_NKMP: type = "nkmp"; break;
default: type = "???"; break;
}
- printf(" %-10s %2s %-10s %-5s %10d Hz\n",
+ printf(" %-12s %2s %-12s %-5s ",
clk->base.name,
clkp_parent ? "<-" : "",
clkp_parent ? clkp_parent->name : "",
- type, clk_get_rate(&clk->base));
+ type);
+ printf("%10d Hz\n", clk_get_rate(&clk->base));
}
}
diff -r 5117512cc207 -r b79ba012c617 sys/arch/arm/sunxi/sunxi_ccu.h
--- a/sys/arch/arm/sunxi/sunxi_ccu.h Thu Jun 29 08:51:27 2017 +0000
+++ b/sys/arch/arm/sunxi/sunxi_ccu.h Thu Jun 29 09:26:06 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_ccu.h,v 1.1 2017/06/28 23:51:29 jmcneill Exp $ */
+/* $NetBSD: sunxi_ccu.h,v 1.2 2017/06/29 09:26:06 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -58,6 +58,8 @@
SUNXI_CCU_UNKNOWN,
SUNXI_CCU_GATE,
SUNXI_CCU_NM,
+ SUNXI_CCU_NKMP,
+ SUNXI_CCU_PREDIV,
};
struct sunxi_ccu_gate {
@@ -82,6 +84,46 @@
.get_parent = sunxi_ccu_gate_get_parent, \
}
+struct sunxi_ccu_nkmp {
+ bus_size_t reg;
+ const char *parent;
+ uint32_t n;
+ uint32_t k;
+ uint32_t m;
+ uint32_t p;
+ uint32_t lock;
+ uint32_t enable;
+ uint32_t flags;
+};
+
+int sunxi_ccu_nkmp_enable(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *, int);
+u_int sunxi_ccu_nkmp_get_rate(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *);
+int sunxi_ccu_nkmp_set_rate(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *, u_int);
+const char *sunxi_ccu_nkmp_get_parent(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *);
+
+#define SUNXI_CCU_NKMP(_id, _name, _parent, _reg, _n, _k, _m, \
+ _p, _enable, _flags) \
+ [_id] = { \
+ .type = SUNXI_CCU_NKMP, \
+ .base.name = (_name), \
+ .u.nkmp.reg = (_reg), \
+ .u.nkmp.parent = (_parent), \
+ .u.nkmp.n = (_n), \
+ .u.nkmp.k = (_k), \
+ .u.nkmp.m = (_m), \
+ .u.nkmp.p = (_p), \
+ .u.nkmp.enable = (_enable), \
+ .u.nkmp.flags = (_flags), \
+ .enable = sunxi_ccu_nkmp_enable, \
+ .get_rate = sunxi_ccu_nkmp_get_rate, \
+ .set_rate = sunxi_ccu_nkmp_set_rate, \
+ .get_parent = sunxi_ccu_nkmp_get_parent, \
+ }
+
struct sunxi_ccu_nm {
bus_size_t reg;
const char **parents;
@@ -89,10 +131,14 @@
uint32_t n;
uint32_t m;
uint32_t sel;
+ uint32_t enable;
uint32_t flags;
#define SUNXI_CCU_NM_POWER_OF_TWO __BIT(0)
+#define SUNXI_CCU_NM_ROUND_DOWN __BIT(1)
};
+int sunxi_ccu_nm_enable(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *, int);
u_int sunxi_ccu_nm_get_rate(struct sunxi_ccu_softc *,
struct sunxi_ccu_clk *);
int sunxi_ccu_nm_set_rate(struct sunxi_ccu_softc *,
@@ -104,7 +150,7 @@
struct sunxi_ccu_clk *);
#define SUNXI_CCU_NM(_id, _name, _parents, _reg, _n, _m, _sel, \
- _flags) \
+ _enable, _flags) \
[_id] = { \
.type = SUNXI_CCU_NM, \
.base.name = (_name), \
@@ -114,17 +160,64 @@
.u.nm.n = (_n), \
.u.nm.m = (_m), \
.u.nm.sel = (_sel), \
+ .u.nm.enable = (_enable), \
.u.nm.flags = (_flags), \
+ .enable = sunxi_ccu_nm_enable, \
+ .get_rate = sunxi_ccu_nm_get_rate, \
+ .set_rate = sunxi_ccu_nm_set_rate, \
.set_parent = sunxi_ccu_nm_set_parent, \
.get_parent = sunxi_ccu_nm_get_parent, \
}
+struct sunxi_ccu_prediv {
+ bus_size_t reg;
+ const char **parents;
+ u_int nparents;
+ uint32_t prediv;
+ uint32_t prediv_sel;
+ uint32_t div;
+ uint32_t sel;
+ uint32_t flags;
+#define SUNXI_CCU_PREDIV_POWER_OF_TWO __BIT(0)
+};
+
+u_int sunxi_ccu_prediv_get_rate(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *);
+int sunxi_ccu_prediv_set_rate(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *, u_int);
+int sunxi_ccu_prediv_set_parent(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *,
+ const char *);
+const char *sunxi_ccu_prediv_get_parent(struct sunxi_ccu_softc *,
+ struct sunxi_ccu_clk *);
+
+#define SUNXI_CCU_PREDIV(_id, _name, _parents, _reg, _prediv, \
+ _prediv_sel, _div, _sel, _flags) \
+ [_id] = { \
+ .type = SUNXI_CCU_PREDIV, \
+ .base.name = (_name), \
+ .u.prediv.reg = (_reg), \
+ .u.prediv.parents = (_parents), \
+ .u.prediv.nparents = __arraycount(_parents), \
+ .u.prediv.prediv = (_prediv), \
+ .u.prediv.prediv_sel = (_prediv_sel), \
+ .u.prediv.div = (_div), \
+ .u.prediv.sel = (_sel), \
+ .u.prediv.flags = (_flags), \
+ .get_rate = sunxi_ccu_prediv_get_rate, \
+ .set_rate = sunxi_ccu_prediv_set_rate, \
+ .set_parent = sunxi_ccu_prediv_set_parent, \
+ .get_parent = sunxi_ccu_prediv_get_parent, \
+ }
+
struct sunxi_ccu_clk {
struct clk base;
enum sunxi_ccu_clktype type;
union {
struct sunxi_ccu_gate gate;
struct sunxi_ccu_nm nm;
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