[src/trunk]: src/sys/arch/arm/allwinner add some more A31 soft reset bits

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/08c6fb738e9d
branches:  trunk
changeset: 333553:08c6fb738e9d
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Nov 08 11:28:52 2014 +0000

description:
add some more A31 soft reset bits

diffstat:

 sys/arch/arm/allwinner/awin_reg.h |  14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diffs (25 lines):

diff -r 24a5a4f2e46a -r 08c6fb738e9d sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sat Nov 08 08:10:13 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Sat Nov 08 11:28:52 2014 +0000
@@ -1888,7 +1888,21 @@
 #define AWIN_A31_AHB_RESET0_SS_RST             __BIT(5)
 #define AWIN_A31_AHB_RESET0_MIPIDSI_RST                __BIT(1)
 
+#define AWIN_A31_AHB_RESET1_DRC1_RST           __BIT(26)
+#define AWIN_A31_AHB_RESET1_DRC0_RST           __BIT(25)
+#define AWIN_A31_AHB_RESET1_DEU1_RST           __BIT(24)
+#define AWIN_A31_AHB_RESET1_DEU0_RST           __BIT(23)
+#define AWIN_A31_AHB_RESET1_GPU_RST            __BIT(20)
+#define AWIN_A31_AHB_RESET1_MP_RST             __BIT(18)
+#define AWIN_A31_AHB_RESET1_FE1_RST            __BIT(15)
+#define AWIN_A31_AHB_RESET1_FE0_RST            __BIT(14)
+#define AWIN_A31_AHB_RESET1_BE1_RST            __BIT(13)
+#define AWIN_A31_AHB_RESET1_BE0_RST            __BIT(12)
 #define AWIN_A31_AHB_RESET1_HDMI_RST           __BIT(11)
+#define AWIN_A31_AHB_RESET1_CSI_RST            __BIT(8)
+#define AWIN_A31_AHB_RESET1_LCD1_RST           __BIT(5)
+#define AWIN_A31_AHB_RESET1_LCD0_RST           __BIT(4)
+#define AWIN_A31_AHB_RESET1_VE_RST             __BIT(0)
 
 #define AWIN_A31_APB1_RESET_DAUDIO1_RST                __BIT(13)
 #define AWIN_A31_APB1_RESET_DAUDIO0_RST                __BIT(12)