commit 5e8b9ffcd8068e262fc41931e5f109690bb3d672
Author: YAMAMOTO Takashi <imuwoto@gmail.com>
Date:   Sat May 2 09:19:48 2026 +0000

    nvmm: remove cpuid leaf 0x40000010
    
    * given the lapic bit disabled, (PR/59424)
      this leaf doesn't seem to have enough motivation anymore.
      as nvmm is used for other places, (dragonfly bsd)
      it's better to avoid guest ABI changes without clear benefits.
    
    * I couldn't find any documenation about what RBX=0 means.
      (vmware or kvm)
    
    we can revisit this when/if someone comes up with a better
    implementation.

diff --git a/sys/dev/nvmm/x86/nvmm_x86_svm.c b/sys/dev/nvmm/x86/nvmm_x86_svm.c
index 84e82e61bfcc..3ee43bca84b8 100644
--- a/sys/dev/nvmm/x86/nvmm_x86_svm.c
+++ b/sys/dev/nvmm/x86/nvmm_x86_svm.c
@@ -42,7 +42,6 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.94 2026/05/01 00:46:30 riastradh
 #include <uvm/uvm_extern.h>
 #include <uvm/uvm_page.h>
 
-#include <x86/apicvar.h>
 #include <x86/cputypes.h>
 #include <x86/specialreg.h>
 #include <x86/dbregs.h>
@@ -841,7 +840,7 @@ svm_inkernel_advance(struct vmcb *vmcb)
 }
 
 #define SVM_CPUID_MAX_BASIC		0xD
-#define SVM_CPUID_MAX_HYPERVISOR	0x40000010
+#define SVM_CPUID_MAX_HYPERVISOR	0x40000000
 #define SVM_CPUID_MAX_EXTENDED		0x8000001F
 static uint32_t svm_cpuid_max_basic __read_mostly;
 static uint32_t svm_cpuid_max_extended __read_mostly;
@@ -1005,15 +1004,6 @@ svm_inkernel_handle_cpuid(struct nvmm_cpu *vcpu, uint64_t eax, uint64_t ecx)
 		memcpy(&cpudata->gprs[NVMM_X64_GPR_RCX], "NVMM", 4);
 		memcpy(&cpudata->gprs[NVMM_X64_GPR_RDX], " ___", 4);
 		break;
-	case 0x40000010: /* VMware-style TSC and LAPIC freq */
-		cpudata->gprs[NVMM_X64_GPR_RAX] = curcpu()->ci_data.cpu_cc_freq / 1000;
-		if (/*PR 59424*/0 && has_lapic())
-			cpudata->gprs[NVMM_X64_GPR_RBX] = lapic_per_second / 1000;
-		else
-			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
-		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
-		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
-		break;
 
 	/*
 	 * extended CPUID range
diff --git a/sys/dev/nvmm/x86/nvmm_x86_vmx.c b/sys/dev/nvmm/x86/nvmm_x86_vmx.c
index 117801e269ca..ccb071ad9fc0 100644
--- a/sys/dev/nvmm/x86/nvmm_x86_vmx.c
+++ b/sys/dev/nvmm/x86/nvmm_x86_vmx.c
@@ -43,7 +43,6 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.94 2026/05/01 00:46:30 riastradh
 #include <uvm/uvm_extern.h>
 #include <uvm/uvm_page.h>
 
-#include <x86/apicvar.h>
 #include <x86/cputypes.h>
 #include <x86/specialreg.h>
 #include <x86/dbregs.h>
@@ -1223,7 +1222,7 @@ error:
 }
 
 #define VMX_CPUID_MAX_BASIC		0x16
-#define VMX_CPUID_MAX_HYPERVISOR	0x40000010
+#define VMX_CPUID_MAX_HYPERVISOR	0x40000000
 #define VMX_CPUID_MAX_EXTENDED		0x80000008
 static uint32_t vmx_cpuid_max_basic __read_mostly;
 static uint32_t vmx_cpuid_max_extended __read_mostly;
@@ -1457,15 +1456,6 @@ vmx_inkernel_handle_cpuid(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
 		memcpy(&cpudata->gprs[NVMM_X64_GPR_RCX], "NVMM", 4);
 		memcpy(&cpudata->gprs[NVMM_X64_GPR_RDX], " ___", 4);
 		break;
-	case 0x40000010: /* VMware-style TSC and LAPIC freq */
-		cpudata->gprs[NVMM_X64_GPR_RAX] = curcpu()->ci_data.cpu_cc_freq / 1000;
-		if (/*PR 59424*/0 && has_lapic())
-			cpudata->gprs[NVMM_X64_GPR_RBX] = lapic_per_second / 1000;
-		else
-			cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
-		cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
-		cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
-		break;
 
 	/*
 	 * extended CPUID range