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RE: POLYx addressing-mode questions
On Friday, August 7, 2020 at 1:46 PM, John Klos wrote:
> >> (page 3-137), but it seems plausible to me that the tbladdr operands
> >> should actually be .af, .ad, .ag, and .ah. Could someone who knows -
> >> or who can test with real hardware - clarify whether this is a mistake
> >> in the VARM or whether they really are .ab?
> >
> > I don't have hardware, but here is one data point: SIMH, in code written
> > by Bob Supnik who knows what he's doing, makes it clear that the tbladdr
> > is indeed an ab argument.
>
> This, plus if you run VMS on SIMH emulating a model that doesn't have POLY
> instructions, won't VMS emulate them properly, and therefore a test can
> tell you?
>
> Which models of VAX have POLY instructions?
Good point.
You don't even have to mess with different models. The vax780 simulator can
turn on and/off different instruction groups.
VAX 11/780 simulator V4.0-0 Current git commit id: 4810b950
sim> sh cpu
CPU idle disabled, model=VAX 11/780, Implementing: All standard VAX instructions and Compatibility mode
8MB, HALT to SIMH
sim> help cpu set
CPU device SET commands:
set CPU SIMHALT Set HALT to trap to simulator
[...]
set CPU INSTRUCTIONS={{NO}G-FLOAT|{NO}D-FLOAT|{NO}PACKED|{NO}EXTENDED|{NO}EMULATED}
Set the CPU Instruction Set
[...]
sim> set cpu instruction=noemulated
sim> show cpu -v instructions
Implementing: Base Instruction Group
ACBB ACBL ACBW ADAWI ADDB2 ADDB3 ADDD2 ADDD3
ADDF2 ADDF3 ADDG2 ADDG3 ADDL2 ADDL3 ADDW2 ADDW3
ADWC AOBLEQ AOBLSS ASHL ASHQ BBC BBCC BBCCI
BBCS BBS BBSC BBSS BBSSI BEQL BGEQ BGEQU
BGTR BGTRU BICB2 BICB3 BICL2 BICL3 BICPSW BICW2
BICW3 BISB2 BISB3 BISL2 BISL3 BISPSW BISW2 BISW3
BITB BITL BITW BLBC BLBS BLEQ BLEQU BLSS
BLSSU BNEQ BPT BRB BRW BSBB BSBW BVC
BVS CALLG CALLS CASEB CASEL CASEW CHME CHMK
CHMS CHMU CLRB CLRL CLRQ CLRW CMPB CMPC3
CMPC5 CMPD CMPF CMPG CMPL CMPV CMPW CMPZV
CVTBD CVTBF CVTBG CVTBL CVTBW CVTDB CVTDF CVTDL
CVTDW CVTFB CVTFD CVTFG CVTFL CVTFW CVTGB CVTGF
CVTGL CVTGW CVTLB CVTLD CVTLF CVTLG CVTLW CVTRDL
CVTRFL CVTRGL CVTWB CVTWD CVTWF CVTWG CVTWL DECB
DECL DECW DIVB2 DIVB3 DIVD2 DIVD3 DIVF2 DIVF3
DIVG2 DIVG3 DIVL2 DIVL3 DIVW2 DIVW3 EDIV EMUL
EXTV EXTZV FFC FFS HALT INCB INCL INCW
INDEX INSQHI INSQTI INSQUE INSV JMP JSB LDPCTX
LOCC MCOMB MCOML MCOMW MFPR MNEGB MNEGD MNEGF
MNEGG MNEGL MNEGW MOVAB MOVAL MOVAQ MOVAW MOVB
MOVC3 MOVC5 MOVD MOVF MOVG MOVL MOVPSL MOVQ
MOVW MOVZBL MOVZBW MOVZWL MTPR MULB2 MULB3 MULD2
MULD3 MULF2 MULF3 MULG2 MULG3 MULL2 MULL3 MULW2
MULW3 NOP POPR PROBER PROBEW PUSHAB PUSHAL PUSHAQ
PUSHAW PUSHL PUSHR REI REMQHI REMQTI REMQUE RET
ROTL RSB SBWC SCANC SKPC SOBGEQ SOBGTR SPANC
SUBB2 SUBB3 SUBD2 SUBD3 SUBF2 SUBF3 SUBG2 SUBG3
SUBL2 SUBL3 SUBW2 SUBW3 SVPCTX TSTB TSTD TSTF
TSTG TSTL TSTW XFC XORB2 XORB3 XORL2 XORL3
XORW2 XORW3
Packed-Decimal-String-Group
ADDP4 ADDP6 ASHP CMPP3 CMPP4 CVTLP CVTPL CVTPS
CVTPT CVTSP CVTTP DIVP MOVP MULP SUBP4 SUBP6
Extended-Accuracy-Group
ADDH2 ADDH3 CLRO CMPH CVTBH CVTDH CVTFH CVTGH
CVTHB CVTHD CVTHF CVTHG CVTHL CVTHW CVTLH CVTRHL
CVTWH DIVH2 DIVH3 MNEGH MOVAO MOVH MOVO MULH2
MULH3 PUSHAO SUBH2 SUBH3 TSTH
Emulating: Emulated-Only-Group
ACBD ACBF ACBG ACBH CRC EDITPC EMODD EMODF
EMODG EMODH MATCHC MOVTC MOVTUC POLYD POLYF POLYG
POLYH
sim>
- Mark
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