Mouse wrote:
cons_A_TX: blbc 1001(r11),0x20044f32
That 1001(r11) is my question to be exact.
I think I said elsewhere in this thread - the longword whose low bit is
being tested is at r11 + 1001 (since the disassembly came from my
disassembler, I can fairly confidently say the 1001 is in hex). So if
the bit is in ffea01, r11 would have to hold ffda00.
Ok.
T hink, the 1001 is a signed 32bit value that just adresses the 0x1
bit in the longword (r11) points to, is that correct?
No. The 1001 is a signed 16-bit value - it could be 32-bit instead,
but I think it would have been disassembled as 00001001 in that case -
which is added to what's in r11. The sum is the address of the
operand. As for which bit is used, the blbc instruction always uses
the least-significant bit; if you need to test some other bit, you need
to use a different instruction (such as bbc, or cmpv plus an ordinary
conditional branch).
That's crazy, isn't it?
Never seen such an instruction on another architecture that just is testing
the least significant bit. Maybe that's useful for some shift operations,
but I think there are better commands for this.