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Re: Interrupt lockout
On Wed, 12 May 2010, Johnny Billquist wrote:
So something seems to be able to lock out the clock from interrupting for
rather long times. Clock interrupts happens at IPL_SCHED, so this would seem
to mean that the system is running at IPL_HIGH for extended periods (I don't
think anything is using the IPL levels in between).
Anyone have any ideas what this might be?
There are several things that could be affecting this. One is the
reduction of IPL levels in the kernel (I can never remember exactly what
they are, but I think they include IPL_HIGH, IPL_SCHED, IPL_VM, and
IPL_NONE). Mapping of hardware interupt levels to these may affect
things. Another thing is that I feel there is much more locking going on
in the kernel with spin mutexes and there may more time spent at higher
IPLs than there used to be previously. Associated with this is the way
mutexes work. Nested spin mutexes do not lower the IPL until the final
mutex exits. This means that if a spin mutex at IPL_HIGH is done while a
lower IPL spin mutex is held, the exit of the IPL_HIGH mutex will continue
running at IPL_HIGH until all the nested spin mutexes have exited. I
can't point to any specific case where this actually happens though.
One other point. You say clock interrupts happen at IPL_SCHED and that
the system might be running at IPL_HIGH for extended periods. If the
system is running at IPL_SCHED, I think that also will block any clock
interrupts at IPL_SCHED. But the real kicker is that I'm not all that
sure the clock interrupts at IPL_SCHED. According to my VAX Architecture
Reference Manual, the interval clock interrupts at IPL 24 (0x18, which is
IPL_SCHED) on the 11/780, 11/750, and 11/730 systems. The preferred
interrupt is IPL 22 (0x16) - which happens to be lower than IPL_VM (0x17),
so the clock interrupt will be blocked during any code protected by a spin
mutex.
--
Michael L. Hitch mhitch%montana.edu@localhost
Computer Consultant
Information Technology Center
Montana State University Bozeman, MT USA
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