On Sun, 14 Nov 2004, Blaz Antonic wrote:
> > - There's a CSR.
>
> At 0x36800000 ? Anything you can remember with regards to bitfields of
> CSR would be invaluable. Judging by what i see it is only 24 bits wide,
> and with incomplete address decoding (so it show up at higher addresses
> too).

Like I said, it was many years ago and I don't have documentation left.

I did, however, write some VAX/VMS device drivers before the operating
system provided support for the bus adapter (meaning that I had to
run the adapter CSRs by myself); give me a few days to rummage around
my alleged den here and see what I can come up with.

Address decoding didn't need to be complete because there was so much
address space assigned to the TURBOchannel adapter.

> > - DMA should not be performed on the VAXstation 4000/60. There are not
> >   enough write buffers in the S-chip on the motherboard and it will hang
> >   if there are simultaneous outstanding writes by the CPU, the
> >   motherboard SCSI, the Ethernet, AND the TURBOchannel option.
>
> Does this mean TC support for these machines is out of the question ?
> Short of 2nd framebuffer i suppose nobody would want their option
> crawling at snail's pace.

General purpose TC support for the 4000/60 is out of the question.
Support for non-DMA devices (serial ports, parallel printer ports, and
one of DEC's fiber network ring thingies (there were two, DEFZA and
DEFTA (IIRC); one did DMA, the other didn't) is possible and may even be
useful.

There is a one green-wire hack that is available on the 4000/60, but it
was not implemented by DEC. If the DMA request from the LANCE is
presented to the TURBOchannel adapter on the spare pin of its
motherboard connector, the TURBOchannel adapter will back off while the
LANCE is doing DMA. This prevents the S-chip from hanging. DMA is
possible on a 4000/60 that has been so modified.

But even with DMA, the option will crawl at a snail's pace in the
VAXstation. There is a SERIOUS mismatch in DMA protocols between the
TURBOchannel and the CVAX pin-bus that the adapter resolves by
collecting the entire DMA transfer before forwarding it to the other
side (one of the diagnostic spaces is access to the FIFO). In the
4000/60, you could only get 5MB/s of DMA throughput. I never timed the
4000/90. On the TURBOchannel, data must be accepted or supplied on each
clock cycle once it is started. CVAX transactions are broken up into
quadword chunks, requiring time for an address to be presented on the
bus (another of the diagnostic spaces allows the address register to be
loaded and incremented to verify it is operating properly).
-- 
Roger Ivie
rivie@ridgenet.net
http://anachronda.webhop.org/
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