Brian Chase wrote:

>The 2nd Ed. VARM discusses the rtVAX, but doesn't mention specific
>models, but I'd gather this would be characteristic of all of them:
>
>   [p. 422]
>
>   11.2.3 rtVAX Memory Management
>
>   The rtVAX is a variant of the VAX Architecture.  An rtVAX processor
>   implements the per-process page tables in physical memory.  All =
other
>   VAX processors implement the per-process page tables in virtual
>   memory. Therefore, translation of process-space addresses is
>   different on an rtVAX than as described in Chapter 4.

This is certainly true of the original rtVAX chip, the KA620. This was
basically a hacked KA630. The idea was to produce a chip that was mostly
a VAX but could not run VMS and hence could be sold cheap without
risking undercutting VMS sales (or so I heard). AFAIK, the later
rtVAX systems were based on standard chips - I never heard of a
cut down CVAX, for example (this doesn't mean it didn't happen though =
...)

>More recently, I've also heard about system known as the ftVAX which is
>a "fault tolerant" version of the VAX.  I don't know anything about it
>apart from it being designed for critical applications.  The one
>significant reference I can find to it in Google is in a PDF document
>for some evil Windows 2000 system:

I used to have an ftVAX in the lab. Two CPUs running in lock-step and
every piece was fully redundant. Various systems were produced. Running
VMS required the Fault Tolerant System Services (at least it did if
you wanted to run it as a fault tolerant system ...) and support for
that stopped in the V6.2 timeframe or so. The top end model (VAXft 810)
either never came out or had a very limited lifespan. There was (IIRC) =
some=20
cooperation with a 3rd party that was going to do an ftAlpha, but that=20
all fell apart.

Antonio
arcarlini@iee.org