> On 28 May, Anders Magnusson wrote:
> 
> >> d/p/l 20088000 80000000
> >> d/p/l 20088004 80000001
> > This maps Qbus page 0 and 1 to physical memory page 0 and 1. Then you
> > can put the correct values in the RXV registers and it will send its data
> > to these memory pages.
> Ahhh. Now I understand these controler setup magic. You have to setup a
> QBus <=> RAM mapping for DMA transfers from the QBus to RAM. Then the
> controller is a command given that loads some setup programm via DMA
> into RAM and "S 80" or the like starts this setup programm. This is
> clever. 
> 
You got it! That's exactly how it works.

> But what does: 
> D/P/W 20001f40 20
> Is this needed to enable DMA transfers? I found that DMA from and to
> the RXV21 only worked after this. (But I may be wrong.)
> 
That's _very_ correct. This address is "local memory external access enable"
and allows the Qbus to do DMA into the CPU memory. The address 20001f40
is a register in the CPU, also used for IPC I think.

-- Ragge