On Thu, 16 Jul 1998, Sheila //or// Bob (depends on who's writing) wrote:
>however, the comm iop did provide a path for off loading the cpu for
>handling DU, DUP, and/or DZ interrupts!!  Simple little single board
>harvard architecture machine with a 180NS cycle time.

  The IOP was a harvard architecture processor?  I didn't know that...that's
very cool.  I've become a big fan of that architecture since I discovered how
cool PIC microcontrollers are.

               -Dave McGuire