Allison J Parent writes:
> 
> <   You wrote:
> <> And in fact the VS2K manual does make it clear that there are
> <> interactions between the NCR and the disk controller (e.g. they share
> <> buffers).
> 
> This is never been adaquately explained.  I believe it to be a 
> misstatement or contextual error with regard to the VS2K manual.

The manual clearly states some details and gives some hints on how
to use the NCR5380 and HDC9224 (see below). I can't judge if the
manual is correct.

> The 9224 UDC has it's own internally dedicated DMA logic that cannot 
> be used for any other device (LANCE is similar). That is indeed 
> curious as the 5380 does not have DMA (internally) at all so that it's 
> dependent on either PIO or some external DMA controller as it is not 
> possible to share a dma channel of either the LANCE or the UDC(9224). 
> If that is true how then would a memory buffer conflicting between the 
> disks and the SCSI device??  This is not a ka4xx thing as the raw chips 
> aka NCR5380, LANCE and UDC(9224) impose this structure on the system.
> 
> Now if you mean that this "buffer" is a pool of memory that is not tied 
> to hardware as the DMA range of the LANCE and UDC is 16mb(24bits) and the 
> poor SCSI chips is DMAless so the PIO driver has whatever access it may 
> need. No conflict there unless drivers used the same pool by error or
> need.

I have no clue if the HDC's DMA logic is used for all kinds of DMA on
KA410 or if there's another implementation with an external DMA controller;
in any case all DMA operations (have to) use the same 16K memory buffer.

The VS2000 manual states that
- there's an 16K DMA buffer memory located at a fixed address
- NCR5380 and HDC9224 read/write data from/to this buffer
- the DMA counter is 14(?) bit, thus offsetting into this 16K 
- there's a set of operations which have to be done mutually exclusive,
  since doing one might damage any other of these operations:
	- accessing registers of NCR5380
	- accessing registers of HDC9224
	- read/write to the DMA buffer
	- NCR doing DMA to/from the buffer
	- HDC doing DMA to/from the buffer
- thus not only it's impossible for each driver to check the state
  of an DMA operation by reading the registers of NCR/HDC, but also
  the two drivers have to be locked against each other, since accessing
  registers of on controller will interrupt any pending DMA operation
  of the other driver.

> The 3100 series members are distinct enough from each other that each 
> must be looked at for commonality and also the specific differeces must 
> be identified.  This should bring some reality to SCSI/FDC/MFM drivers for 
> the small box vaxen.

Some models of 3100 have an 128K DMA buffer plus a 16K "compatibility"
buffer. I don't know if this 16K buffer is used for/by HDC9224 on the
SCSI/MFM daugtherboard. At least with the SCSI/SCSI option there no
need to use the 16K buffer. DMA counters on 2000 and 3100/76 differ
eg. in one using 1-complement and the other using 2-complement of the
transfer size for initialization. Don't know about other models of 3100.
SCSI drivers for the SCSI/SCSI option can be simpler than drivers for
the SCSI/MFM option, since all dependencies are within on driver and
don't cross "driver boundaries".

> The above features should make a SCSI driver for the vs2k much simpler.

?

Ciao,
	bertram