I really loved the VAX when it came out.  Sure, it took 22 hours to build
4.3BSD from source on a 750, and a 486DX can do the same for NetBSD in about
2 hours.  The point several folks here have made is, in 1983 your choices
were a 750 or an AT.  I ran entire datacenters serving the computational
needs of 150-person companies on 750's.  I never did try that with an AT or
even 150 AT's (which would not have fared well in price or performance or
price/performance against a pair of 750's, anyway.)

But since several folks here are dead set on shouting "Intel!" in a movie
theatre crowded with folks who think real computers should be towed behind
cars rather than put into the trunks of cars, and since we're also stuck in
the loop of "so how would a P-51 fare against a MiG-23 anyway?", I will put
in my own time-looped comparisons.

> Not really the ISA bus runs at a bus clock of 8mhz and the Q-bus is not so 
> limited.  For some items like DMA q-bus is actaully faster and can do 
> things like linked list DMA.

Linked list DMA is an attribute of the controller not the bus.  The AMD Lance
chip, and the early 3Com UNIBUS Ethernet controllers, all did this.  So does
the Adaptec 1542 ISA controller.  So the interesting comparison here is that
most ISA adaptors didn't do it, while most UNIBUS and Q-BUS adaptors did.
Note that this is just mass storage and networking -- terminal controllers
were and are pretty much PIO everywhere except the latest National parts,
simply because the DMA setup time was hard to amortize over the usual TTY
transfer sizes until the baud rates got up into the ISDN speeds and multiplied
over more than four ports per DMA engine.

> ... less capable despite having a superfast 386.  Why?  Too much sluggy IO
> in the PC, DMA is not used for a lot of stuff and the cpu spends time in 
> loops doing PIO(no fault of *nix) never minding the work it has to do 
> to manage the video. 

Actually, the problem with DMA evolution on the Pee Cee is that it all began
with motherboard DMA.  Even the most modern Pee Cee uses motherboard DMA for
floppy access.  Floppies can offer or consume 25KB/sec of data due to density
and speed of rotation.  PIO would be fast enough to handle this.  You end up
not getting any parallelism from motherboard DMA because of the bus paths it
blocks for the entire transfer duration (it doesn't arbitrate memory for each
byte, nor does it do any kind of bursting, nor can it ever be taught to do so
due to backward compatibility issues.)  No wonder it took several years for
anybody to think adaptor-based DMA was worth having on the Pee Cee.

> Raw cpu power is far from the best indicator.

Right.  Total size and weight is the best indicator, at least for those on
this list.  I think we should get back to the "my VAX weighs more than your
VAX" arguments and leave Intel completely out of it.