New Timekeeper/RAM clock stops on power loss?

["John D. Baker" <jdbaker%consolidated.net@localhost>]

Tired of re-initializing the timekeeper/RAM in one of my SS5s every time
the power blinks, I finally unstacked it and replaced the timekeeper/RAM
with a new one (albeit purchased long, long ago now).

Rather than the stock MK48T08, I used the MK48T59--the same as used in
the Ultra-5 and others.  Other than having a couple of extra capabilities,
they appeared to be otherwise identical.  I have done the same replacement
in other SS5s without issue.

On this particular machine (or maybe just this particular part), when the
power is lost (either by utility failure or normal power-down) the clock
stops ticking.  When powered up again, the OBP reports "Starting real-time
clock", as if the timekeeper/RAM had been put to sleep using "power-off"
from OBP (sets "ST" bit in one of the clock control registers).

The NVRAM contents are retained so I believe the battery has good life
yet.

Has anyone seen anything similar, on any flavor/generation of sparc(64)?

If possible, I can catch it during boot and boot single-user and set the
date/time.  If I immediately reboot and stop in OBP, the date shows what
I set it to.  If I then let it boot, NetBSD thinks the clock has started
from zero.

Instead, once I set the date from single-user mode, I have to let it go
multi-user at least this once before it will get the correct date on
subsequent boots.  Is this the expected behavior?

Thanks.

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