Ross 511-6526 mbus modules

[McGrude <mcgrude%gmail.com@localhost>]

I've acquired two Ross 511-6526 mbus modules.  These are each dual cpu
cache-less mbus modules.   The page here
https://www.netbsd.org/ports/sparc/faq.html#smp-cpus states I'll run
into problems running two of these in one system with zero cache.
Is there any way around that limitation?

I am successfully running one in a sparc20, but would like to add the
second one if it were possible.

 - Mike