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On 2005.09.07 13:39:07 +0000, Bruce O'Neel wrote:
| Hi,
|=20
| Ah, interesting data point.  I'll pull out my Supersparc processor over
| the next few days and see if that makes a difference.
|=20
| Do you have a supersparc or supersparc II?

I believe they are SuperSPARC only.

cpu0 at mainbus0: mid 8: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled
cpu1 at mainbus0: mid 10: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled

		-- Rui Paulo

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