On Sun, Aug 01, 2004 at 06:52:56PM +0200, Manuel Bouyer wrote:

> I'm runnning this:
> NetBSD 2.0_BETA (GENERIC.MP) #4: Wed Jul 21 22:43:18 CEST 2004
>         bouyer@maumusson:/obj/sparc/obj/home/bouyer/src/sys/arch/sparc/compile/GENERIC.MP
> total memory = 111 MB
> avail memory = 104 MB
> bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@3,0
> mainbus0 (root): SUNW,SPARCstation-10: hostid 7270d152
> cpu0 at mainbus0: mid 8: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
> cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l), 1024K external (32 b/l): cache enabled
> cpu1 at mainbus0: mid 10: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
> cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l), 1024K external (32 b/l): cache enabled
> 
> I didn't encounter any problems ... I'm updating sources and will start a
> new build.

looks familiar, except mine are in a 20 chassis.  (:

NetBSD 2.0_BETA (GENERIC.MP) #0: Thu Apr 29 14:07:17 UTC 2004
	autobuild@tgm.netbsd.org:/autobuild/netbsd-2-0/sparc/OBJ/autobuild/netbsd-2-0/src/sys/arch/sparc/compile/GENERIC.MP
total memory = 511 MB
avail memory = 495 MB
bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@1,0
mainbus0 (root): SUNW,SPARCstation-20: hostid 72736d12
cpu0 at mainbus0: mid 8: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled
cpu1 at mainbus0: mid 10: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled

this machine handles email for my domain (plus a friend's) and hasn't paniced
yet, even with spamassassin.  (:

-- 
  Aaron J. Grier | "Not your ordinary poofy goof." | agrier@poofygoof.com
  "someday the industry will have throbbing frontal lobes and will be able
  to write provably correct software.  also, I want a pony." -- Zach Brown