Trying a SMP kernel (before and after the nathan_sw merge, doesn't
matter), I get:

	cpu0 at mainbus0: mid 8: TMS390Z50 v1 @ 40 MHz, on-chip FPU
	cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled
	cpu1 at mainbus0: mid 10CPU did not spin up
	: TMS390Z50 v1 @ 40 MHz, (null) FPU
	cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l):
	...
	cpu0: booting secondary processors:

I wonder what that "CPU did not spin up" means.

I have already increased the loop value in
sys/archs/sparc/sparc/cpu.c::cpu_spinup(), but it only waited longer. I
think I have it at 1000000L now, which stops for a few seconds.

I've swapped the two CPUs, and got the same error. I assume that means
that both CPUs do at least work, and none is broken beyond help.

Is there a way to get these going with SMP?


 - Hubert

-- 
Want to get a clue on IPv6 but don't know where to start? Try this:
* Basics -> http://www.onlamp.com/pub/a/onlamp/2001/05/24/ipv6_tutorial.html
* Setup  -> http://www.onlamp.com/pub/a/onlamp/2001/06/01/ipv6_tutorial.html
Of course with your #1 IPv6 ready operating system -> http://www.NetBSD.org/