In message <017d01c17667$db926cc0$0100a8c0@snowdrop> you write:

|> > Are you stating that the network interface on the motherboard is
|> > implemented in an inferior manner?  I.e. no DMA, etc.?
|> 
|> No - it is 'identical' to the Sbus cards except that it has certain
|> advantages (over the single port Sbus cards):
|> 
|> 1) The motherboard probably has the DMA+ chip (not the DMA one) this
|>    means you can misalign receive buffers and still get data bursts
|>    on the Sbus.  (It is necessary to align the rx buffer then do a
|>    software copy to align' IP headers - which is on a 4n+2 boundary
|>    within the frame.)
|>    (wonder what netBSD does....)
|> 
|> 2) Sbus slot 0 (the motherboard I/O) will (typically) have a higher
|>    priority than any of the other Sbus slots, the ethernet interface
|>    also has priority over the SCSI interface within the DMA+ silicon.
|>    This means that the motherboard ethernet is unlikely to suffer
|>    fifo underrun/overrun problems (on a single cpu system).
|> 
|> The Sbus priority/latency issues are even worse for any 100M (ethernet
|> or FDDI) cards that do not have on-board buffer storage.

So, what are your recommendations:

- a Sparc-2's on-board le or a 501-2015 FSBE's lebuffer/le
- a Sparc-10's on-board le or      ./.

	Volker