Ummm, did people here commenting about the SS10 just leave their
clues somewhere and forget that the MBUS slots support cpu's from
the 33MHz SuperSPARC to the 200MHz ROSS HyperSPARC ?  I think you
can even get quad configs running at 200MHz, but that'll cost you
big bucks.  Catch being that the SuperSPARC's (I & II) all came
with 1MB L2 cache whilst the Ross cpu's had 128/256/512k.  There
maybe some limit on the SS10 which limits it to 180MHz HyperSPARCs
with the SS20 able to host the 200MHz ones.

In terms of performance, the usual throw away line used is that
the SuperSPARC at x MHz is equivalent to the microSPARC at 2*x MHz.


                        model  MHz  SPECint92 SPECfp92 SPECint  SPECfp
                        -----  ---  --------- -------- -Rate92--Rate92-
                        10/20  33     39.8      46.6     943     1104
                        10/30  36     45.2      54.0    1072     1282
                        10/40  40     50.2      60.2    1191     1427
                        10/402 40x2                     2112     2378
                        10/41  40     53.2      67.8    1264     1607
                        10/412 40x2                     2411     2854
                        10/51  50     65.2      83.0    1580     2008
                        10/512 50x2                     2950     3744
                        10/514 50x4                     5155     5809

    SPARCstation 5
        Processor(s):   microSPARC II @ 70MHz, 85MHz, 110MHz;
                        57.0/64.0/? SPECint92, 47.3/54.6/? SPECfp92,
                        1352/1518/? SPECintRate92, 1122/1295/? SPECfpRate92

Darren