Subject: Re: High serial port (output) speeds
To: Dave McGuire <>
From: Michael Lorenz <>
List: port-sparc
Date: 10/23/1999 11:56:29
Greetings !

> On Sat, 23 Oct 1999, der Mouse wrote:
> >Of course, all of this is predicated on the Sun PCLK frequency of
> >4.9152MHz.  The Z8530 can, I imagine, do either speed without any
> >trouble at all if you feed it an appropriate clock frequency.
>   The Z8530 is good for 1mbit per channel...but of course, as you say, it's a
> matter of feeding it the right clocks.

Hmm, some years ago I did some lowlevel programming on a Z80 system which of
course used the Z80 SIO as serial controller. As far as I remember the Z8530 is
just a crippled Z80 SIO OK, the Z80 SIO was able to use half it's clock as
transmission clock when equipped with a DMA controller at its back, which gives
you pretty 2MBit on a 4MHz Z80. cool. But you needed the DMA controller because
the processor coudn't handle the throughput. Then at least this Z80 system used
an external clock chip ( guess what - a Z80 CTC ) to generate the transmission
clock. btw. the Z80 SIO could do some more nice things like SDLC and HDLC
protocol... but I never used this.
So stands the question: what are the read differences between the Z8530 and the
Z80 SIO ? SInce the SPARC runs at a far higher clock than the Z80 it should be
able to handle a much higher interrupt frequency ( the Z80 SIO has 4 bytes
receive buffer and used 4 interrupts per channel ). I don't know anything about
how a SPARC handles interrupts so please don't laugh. The Z80 interrupt mode 2
used a single IRQ line, when it goes high the processor does an "interrupt
acknowledge cycle" in which it asked the chip which issued the interrupt for a
"vector" which was used as an offset in a table of jump addresses, so interrupt
sharing was nothing to worry about with a Z80 since it could handle 128 different
interrupt sources without any headache... Could a SPARC do something like this to
use the status interrupts of the Z8530 ? ( when they didn't cripple the Z80 SIOs
interrupt system... ) the 4 interrupts it could generate were low water in send
buffer, high water in receive buffer, byte received and error as far as I

ok, enough nostalgia