> [ re-directing to port-sparc ... that's where it belongs, really... ]
> 
> On Wed, 25 Sep 1996 03:57:14 +0200 (MET DST) 
>  Koen De Vleeschauwer <koen@EU.net> wrote:
> 
>  > When trying to boot -current on a Sun SS10:
>  > cpu0 at mainbus0: TI, TMS390Z50 @ 36 Mhz, on-chip FPU
>  > cpu0: physical 20K instruction (64b/l), 16K data (32b/l) cache enabled
>  > then hangs; no response to break.
> 
> This is the same problem I have with the SS10 in my network lab.
> 
> Having talked to Aaron Brown and Chris Torek a bit about it, it turns
> out that the CPU module in my SS10 doesn't have the MXCC stuff, and thus
> doing the cache operations is _much_ harrier...  Apparently, one model
> of SS20 is the same way.
> 
> I dunno if Aaron's figured out a way to deal with that yet...

I have some idea of what to do about it. It basically requires writing
a cache-flush routine (there's no automagical way to do it on a 
SuperSPARC--you have to read carefully chosen stuff, or munge the tags, 
etc), and then calling it at the appropriate times. It's a bit
complicated, especially with the caching framework that is in the
NetBSD code base (I've got a reworked version partially completed,
but finishing keeps getting bumped from the top of my TODO list).

I probably won't have time to fix this any time soon since I'm in the
middle of writing my thesis; if there's someone knowledgable and 
motivated out there, I can pass on the info and code that I have...

--Aaron