I don't find this at all strange.

The 4c's use a 64KB unified I+D direct mapped cache.

In the dynamic linked case, some libary function is probably mapped
at an address that uses the same cache line(s) as some fairly heavily
used loop or variable in the compuation.  I'd be trying to add some
extra data or text to change the addresses accessed heavily by the
computation.

In the static case, all the library funcs have been pulled into
the text segment of the executable, hence no cache line collisions.

I don't quite recall what the 4300 boards did for cache, but it was probably
64KB I and 64KB separate direct mapped caches.  If the dynamic numbers
on this sun4 arch machine are much better that the 4c numbers (and all other
things are equal) it's a good bet that that you are getting cache line
conflicts between text addresses in the different address segments


HTH

Paul

P.S.  Hi Greg.

#include <std/disclaimer.h>