In article <20050326100429.7FD472DA27@cvs.netbsd.org> on source-changes
tsutsui@netbsd.org wrote:

> Modified Files:
> 	src/sys/arch/sgimips/sgimips: machdep.c
> 
> Log Message:
> mips_sdcache_forceinv has been removed.
> 
> XXX Should we check MIPS3_CONFIG_SE in mips3_cp0_config_read() and
> XXX call r5k_enable_sdcache() accordingly here?

Pavel Cahyna reports me that 3.99.x kernel
(which should have L2 cache enabled) is not faster
than 2.0.x kernels (whose L2 is disabled) at all.

Sekiya-san told me that calling r5k_enable_sdcache() on IP22
caused other problem and L2 cache was already enabled by ARCS,
but on IP32 r5k_enable_sdcache() seems required explicitly.

Is it OK to commit the attached patch for now?
Or, is there any way to check if L2 cache is activated?
---
Izumi Tsutsui

Index: machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/sgimips/machdep.c,v
retrieving revision 1.93
diff -u -r1.93 machdep.c
--- machdep.c	3 Jun 2005 19:02:33 -0000	1.93
+++ machdep.c	13 Oct 2005 17:50:45 -0000
@@ -862,6 +862,8 @@
 #if defined(MIPS3)
 	case MIPS_R5000:
 	case MIPS_RM5200:
+		if (mach_type == MACH_SGI_IP32)
+			r5k_enable_sdcache();
 		break;
 #endif
 	}