Subject: Re: NOTICE: thorpej-mips-cache branch will be merged today
To: Michael L. Hitch <mhitch@lightning.msu.montana.edu>
From: Jason R Thorpe <thorpej@wasabisystems.com>
List: port-sgimips
Date: 11/17/2001 10:10:10
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On Fri, Nov 16, 2001 at 06:33:47PM -0700, Michael L. Hitch wrote:

 >   I think I noticed a simliar problem once with the new SCSI driver.  I
 > seem to remember doing an init, which cleared it up.  The problem is very
 > likely due to the new SCSI driver negotiating sync transfer mode, and when
 > rebooting, the device is still sync while the kernel has defaulted to
 > async.  The 33C93 chip does not appear to have any way to do a SCSI bus
 > reset (a problem I remember from long ago in the amiga driver as well).  I
 > would guess that 33C93 designs would need to have additional logic to do a
 > SCSI bus reset.

So, I looked into this just a little bit.  I have a patch that seems
to reset the SCSI bus, at least, my devices are detected "reliably" now.

However, my CD-ROM isn't probed properly ... comes up as direct/fixed.
Weird.

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 1.5Y (SHAG-IMPACT) #5: Sat Mar 17 06:50:47 PST 2001
    thorpej@impact.slow-10.shagadelic.org:/amd/yeah-baby/u1/netbsd/src/sys/arch/sgimips/compile/SHAG-IMPACT
256 MB memory, 233 MB free, 768 KB for ARCS, 13208 KB in 3302 buffers
mainbus0 (root): SGI-IP22 [SGI, 6909860f], 1 processor
cpu0 at mainbus0: MIPS R4400 CPU (0x460) Rev. 6.0 with MIPS R4010 FPC Rev. 0.0
cpu0: 16KB/16B direct-mapped L1 Instruction cache, 48 TLB entries
cpu0: 16KB/16B direct-mapped write-back L1 Data cache
cpu0: 2048KB/128B direct-mapped write-back L2 Unified cache
imc0 at mainbus0 addr 0x1fa00000
imc0: Revision 3
gio0 at imc0
hpc0 at gio0 addr 0x1fb80000
zsc0 at hpc0
zstty0 at zsc0 channel 1 (console i/o)
zstty1 at zsc0 channel 0
sq0 at hpc0: SGI Seeq 80c03
sq0: Ethernet address 08:00:69:09:86:0f
wdsc0 at hpc0: WD33C93B SCSI, rev=0, target 7
scsibus0 at wdsc0: 8 targets, 8 luns per target
dsclock0 at hpc0 offset 0x60000
biomask 07 netmask 07 ttymask 0f clockmask bf
scsibus0: waiting 2 seconds for devices to settle...
sd0 at scsibus0 target 1 lun 0: <SEAGATE, ST34573N, 5958> SCSI2 0/direct fixed
sd0: 4340 MB, 7501 cyl, 5 head, 237 sec, 512 bytes/sect x 8888924 sectors
sd0: sync (200.0ns offset 12), 8-bit (5.000MB/s) transfers, tagged queueing
sd1 at scsibus0 target 2 lun 0: <TOSHIBA, CD-ROM XM-5401TA, 0436> SCSI2 0/direct fixed
sd1: could not mode sense (4/5); using fictitious geometry
sd1(wdsc0:0:2:0): not ready, data = 00 00 00 00 04 01 00 00 00 00
sd1(wdsc0:0:2:0): could not get size
sd1: 0, 0 cyl, 64 head, 32 sec, 512 bytes/sect x 0 sectors
sd1: async, 8-bit transfers
st0 at scsibus0 target 6 lun 0: <ARCHIVE, Python 25601-XXX, 2.75> SCSI2 1/sequential removable
st0: drive empty
st0: sync (200.0ns offset 12), 8-bit (5.000MB/s) transfers
IPsec: Initialized Security Association Processing.
boot device: sd0
root on sq0

I can transfer data from the disk, though, at least :-)

74579968 bytes transferred in 22.060 secs (3380778 bytes/sec)

..and piping it through hexdump -C seems sane:

00000000  0b e5 a9 41 00 00 00 01  2f 75 6e 69 78 00 00 00  |...A..../unix...|
00000010  00 00 00 00 00 00 00 00  00 00 00 00 1d 4d 00 00  |.............M..|
00000020  00 05 00 00 00 00 00 ed  02 00 00 00 00 00 00 00  |................|
00000030  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000040  00 00 00 00 00 87 a2 5c  73 67 69 6c 61 62 65 6c  |.......\sgilabel|
00000050  00 00 00 02 00 00 02 00  73 61 73 68 00 00 00 00  |........sash....|
00000060  00 00 00 03 00 04 f0 00  69 64 65 00 00 00 00 00  |........ide.....|
00000070  00 00 04 ed 00 04 f0 00  00 00 00 00 00 00 00 00  |................|
00000080  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
000000f0  00 00 00 00 00 00 00 00  00 61 73 68 00 00 00 00  |.........ash....|
00000100  ff ff ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000110  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000120  00 00 00 00 00 00 00 00  00 64 65 00 00 00 00 00  |.........de.....|
00000130  ff ff ff ff 00 00 00 00  00 83 92 5c 00 04 10 00  |...........\....|
00000140  00 00 00 0a 00 04 00 00  00 00 10 00 00 00 00 03  |................|
00000150  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
00000190  00 00 00 00 00 00 00 00  00 00 10 00 00 00 00 00  |................|
000001a0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
000001b0  00 87 a2 5c 00 00 00 00  00 00 00 06 00 00 00 00  |...\............|
000001c0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*

When I halt the system back to ARCS, I see:

Mar 17 07:01:31 impact syslogd: exiting on signal 15
syncing disks... done
halting...

sc0,1,0: cmd=0x12 timeout after 2 sec.  Resetting SCSI bus
Cannot connect to keyboard -- check the cable.
Cannot open keyboard() for input
Cannot connect to keyboard -- check the cable.
Cannot open keyboard() for input


System Maintenance Menu

1) Start System
2) Install System Software
3) Run Diagnostics
4) Recover System
5) Enter Command Monitor

Option?

So for kicks, I brought it up into IRIX, then halted it back to ARCS and
tried booting again.  Still sees the CD-ROM strangely...

My patch is attached -- if someone wants to play with this, please do so :-)

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>

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Index: hpc/hpcdma.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sgimips/hpc/hpcdma.c,v
retrieving revision 1.1
diff -c -r1.1 hpcdma.c
*** hpc/hpcdma.c	2001/08/19 03:16:21	1.1
--- hpc/hpcdma.c	2001/11/17 17:56:54
***************
*** 159,164 ****
--- 159,176 ----
  }
  
  void
+ hpcdma_reset(sc)
+ 	struct hpc_dma_softc *sc;
+ {
+ 
+ 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL,
+ 	    HPC_DMACTL_RESET);
+ 	delay(100);
+ 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL, 0);
+ 	delay(1000);
+ }
+ 
+ void
  hpcdma_flush(sc)
  	struct hpc_dma_softc *sc;
  {
Index: hpc/hpcdma.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sgimips/hpc/hpcdma.h,v
retrieving revision 1.2
diff -c -r1.2 hpcdma.h
*** hpc/hpcdma.h	2001/11/10 07:32:42	1.2
--- hpc/hpcdma.h	2001/11/17 17:56:54
***************
*** 62,67 ****
--- 62,68 ----
  void hpcdma_init(struct hpc_attach_args *, struct hpc_dma_softc *, int);
  void hpcdma_sglist_create(struct hpc_dma_softc *, bus_dmamap_t);
  void hpcdma_cntl(struct hpc_dma_softc *, u_int32_t);
+ void hpcdma_reset(struct hpc_dma_softc *);
  void hpcdma_flush(struct hpc_dma_softc *);
  
  #endif /* _SGIMIPS_HPC_DMA_H */
Index: hpc/sbic.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sgimips/hpc/sbic.c,v
retrieving revision 1.3
diff -c -r1.3 sbic.c
*** hpc/sbic.c	2001/11/10 22:54:54	1.3
--- hpc/sbic.c	2001/11/17 17:56:56
***************
*** 259,264 ****
--- 259,267 ----
  
  	s = splbio();
  
+ 	if (dev->sc_reset != NULL)
+ 		(*dev->sc_reset)(dev);
+ 
  	my_id = dev->sc_channel.chan_id & SBIC_ID_MASK;
  	if (dev->sc_clkfreq < 110)
  		my_id |= SBIC_ID_FS_8_10;
Index: hpc/sbicvar.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sgimips/hpc/sbicvar.h,v
retrieving revision 1.2
diff -c -r1.2 sbicvar.h
*** hpc/sbicvar.h	2001/11/10 07:32:43	1.2
--- hpc/sbicvar.h	2001/11/17 17:56:56
***************
*** 180,185 ****
--- 180,186 ----
  					    size_t *,int,size_t *));
  	int  (*sc_dmago) __P((struct sbic_softc *));
  	void (*sc_dmastop) __P((struct sbic_softc *));
+ 	void (*sc_reset) __P((struct sbic_softc *));
  };
  
  /* values for sc_flags */
Index: hpc/wdsc.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sgimips/hpc/wdsc.c,v
retrieving revision 1.2
diff -c -r1.2 wdsc.c
*** hpc/wdsc.c	2001/11/10 07:32:43	1.2
--- hpc/wdsc.c	2001/11/17 17:56:57
***************
*** 90,95 ****
--- 90,96 ----
  				int, size_t *));
  int     wdsc_dmago      __P((struct sbic_softc *));
  void    wdsc_dmastop    __P((struct sbic_softc *));
+ void	wdsc_reset	__P((struct sbic_softc *));
  int     wdsc_dmaintr    __P((void *));
  int     wdsc_scsiintr   __P((void *));
  
***************
*** 149,154 ****
--- 150,156 ----
  	sc->sc_dmasetup = wdsc_dmasetup;
  	sc->sc_dmago    = wdsc_dmago;
  	sc->sc_dmastop  = wdsc_dmastop;
+ 	sc->sc_reset	= wdsc_reset;
  
  	sc->sc_adapter.adapt_request = sbic_scsi_request;
  	sc->sc_adapter.adapt_minphys = minphys;
***************
*** 265,270 ****
--- 267,285 ----
  	if (wsc->sc_flags & WDSC_DMA_MAPLOADED)
  		bus_dmamap_unload(wsc->sc_dmat, wsc->sc_dmamap);
  	wsc->sc_flags &= ~(WDSC_DMA_ACTIVE | WDSC_DMA_MAPLOADED);
+ }
+ 
+ /*
+  * Reset the controller.
+  */
+ void
+ wdsc_reset(dev)
+ 	struct sbic_softc *dev;
+ {
+ 	struct wdsc_softc *wsc = (void *)dev;
+ 	struct hpc_dma_softc *dsc = &wsc->sc_hpcdma;
+ 
+ 	hpcdma_reset(dsc);
  }
  
  /*

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