# Jachym Holecek 2006-10-31:
> The patch below changes evbppc to map just 0 upto endkernel to make sure
> the trap code has everything it could possibly need. Looks OK to commit?

As Simon noted, this is wrong, we must map console/devices after
(vaddr_t)roundup(physmem, 16MB) so that pmap_tlbmiss() continues
to work. Updated patch below, does it look OK this time?

	-- Jachym

Index: powerpc/ibm4xx/pmap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/pmap.c,v
retrieving revision 1.43
diff -d -p -u -r1.43 pmap.c
--- powerpc/ibm4xx/pmap.c	16 Oct 2006 18:14:35 -0000	1.43
+++ powerpc/ibm4xx/pmap.c	4 Nov 2006 16:57:50 -0000
@@ -1478,9 +1478,9 @@ pmap_tlbmiss(vaddr_t va, int ctx)
 	tlbmiss_ev.ev_count++;
 
 	/*
-	 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
+	 * We will reserve 0 upto ${ramsize} for va == pa mappings.
 	 */
-	if (ctx != KERNEL_PID || (va & 0x80000000)) {
+	if (ctx != KERNEL_PID || (va < ctob((vaddr_t)physmem))) {
 		pte = pte_find((struct pmap *)__UNVOLATILE(ctxbusy[ctx]), va);
 		if (pte == NULL) {
 			/* Map unmanaged addresses directly for kernel access */
Index: evbppc/explora/machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/explora/machdep.c,v
retrieving revision 1.15
diff -d -p -u -r1.15 machdep.c
--- evbppc/explora/machdep.c	23 Oct 2006 06:49:17 -0000	1.15
+++ evbppc/explora/machdep.c	4 Nov 2006 16:58:01 -0000
@@ -188,15 +188,14 @@ bootstrap(u_int startkernel, u_int endke
 
 	/*
 	 * Setup initial tlbs.
-	 * Physical memory and  console device are
+	 * Kernel memory and  console device are
 	 * mapped into the first (reserved) tlbs.
 	 */
 
-	t = 0;
-	for (maddr = 0; maddr < phys_mem[0].size; maddr += TLB_PG_SIZE)
+	for (maddr = 0; maddr < endkernel; maddr += TLB_PG_SIZE)
 		ppc4xx_tlb_reserve(maddr, maddr, TLB_PG_SIZE, TLB_EX);
 
-	/* Map PCKBC, PCKBC2, COM, LPT. */
+	/* Map PCKBC, PCKBC2, COM, LPT. This is far beyond physmem. */
 	ppc4xx_tlb_reserve(BASE_ISA, BASE_ISA, TLB_PG_SIZE, TLB_I | TLB_G);
 
 #ifndef COM_IS_CONSOLE
Index: evbppc/obs405/obs200_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/obs405/obs200_machdep.c,v
retrieving revision 1.4
diff -d -p -u -r1.4 obs200_machdep.c
--- evbppc/obs405/obs200_machdep.c	16 Oct 2006 18:14:35 -0000	1.4
+++ evbppc/obs405/obs200_machdep.c	4 Nov 2006 16:58:09 -0000
@@ -132,12 +132,13 @@ initppc(u_int startkernel, u_int endkern
 	bios_board_init(info_block, startkernel);
 	memsize = bios_board_memsize_get();
 
-	/* Linear map whole physmem. */
-	for (va = 0; va < memsize; va += TLB_PG_SIZE)
+	/* Linear map kernel memory. */
+	for (va = 0; va < endkernel; va += TLB_PG_SIZE)
 		ppc4xx_tlb_reserve(va, va, TLB_PG_SIZE, TLB_EX);
 
-	/* Map console right after RAM. */
-	ppc4xx_tlb_reserve(OBS405_CONADDR, va, TLB_PG_SIZE, TLB_I | TLB_G);
+	/* Map console after physmem (see pmap_tlbmiss()). */
+	ppc4xx_tlb_reserve(OBS405_CONADDR, roundup(memsize, TLB_PG_SIZE),
+	    TLB_PG_SIZE, TLB_I | TLB_G);
 
 	/* Initialize IBM405GPr CPU */
 	ibm40x_memsize_init(memsize, startkernel);
Index: evbppc/obs405/obs266_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/obs405/obs266_machdep.c,v
retrieving revision 1.5
diff -d -p -u -r1.5 obs266_machdep.c
--- evbppc/obs405/obs266_machdep.c	16 Oct 2006 18:14:35 -0000	1.5
+++ evbppc/obs405/obs266_machdep.c	4 Nov 2006 16:58:13 -0000
@@ -128,12 +128,13 @@ initppc(u_int startkernel, u_int endkern
 	openbios_board_init(info_block, startkernel);
 	memsize = openbios_board_memsize_get();
 
-	/* Linear map whole physmem */
-	for (va = 0; va < memsize; va += TLB_PG_SIZE)
+	/* Linear map kernel memory */
+	for (va = 0; va < endkernel; va += TLB_PG_SIZE)
 		ppc4xx_tlb_reserve(va, va, TLB_PG_SIZE, TLB_EX);
 
-	/* Map console just after RAM */
-	ppc4xx_tlb_reserve(OBS405_CONADDR, va, TLB_PG_SIZE, TLB_I | TLB_G);
+	/* Map console after RAM (see pmap_tlbmiss()) */
+	ppc4xx_tlb_reserve(OBS405_CONADDR, roundup(memsize, TLB_PG_SIZE),
+	    TLB_PG_SIZE, TLB_I | TLB_G);
 
 	/* Initialize IBM405GPr CPU */
 	ibm40x_memsize_init(memsize, startkernel);
Index: evbppc/walnut/machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbppc/walnut/machdep.c,v
retrieving revision 1.30
diff -d -p -u -r1.30 machdep.c
--- evbppc/walnut/machdep.c	16 Oct 2006 18:14:35 -0000	1.30
+++ evbppc/walnut/machdep.c	4 Nov 2006 16:58:15 -0000
@@ -195,12 +195,13 @@ initppc(u_int startkernel, u_int endkern
 	availmemr[0].start = startkernel; 
 	availmemr[0].size = board_data.mem_size - availmemr[0].start;
 
-	/* Linear map whole physmem */
-	for (va = 0; va < board_data.mem_size; va += TLB_PG_SIZE)
+	/* Linear map kernel memory */
+	for (va = 0; va < endkernel; va += TLB_PG_SIZE)
 		ppc4xx_tlb_reserve(va, va, TLB_PG_SIZE, TLB_EX);
 
-	/* Map console just after RAM */
-	ppc4xx_tlb_reserve(0xef000000, va, TLB_PG_SIZE, TLB_I | TLB_G);
+	/* Map console after physmem (see pmap_tlbmiss()) */
+	ppc4xx_tlb_reserve(0xef000000, roundup(physmemr[0].size, TLB_PG_SIZE),
+	    TLB_PG_SIZE, TLB_I | TLB_G);
 
 	/*
 	 * Initialize lwp0 and current pcb and pmap pointers.