Izumi Tsutsui wrote:
> IMO, it's better to summarize how many possible 4xx CPU variants
> should be handled in that layer, and then design structure for
> each of them before implementing it. At least there is another
> port for PPC405D5Xn core:
> http://mail-index.netbsd.org/port-powerpc/2006/04/26/0000.html

it should also be mentioned, that the Virtex chips can have one or two 
CPU's ...