At 11:51 AM 5/18/2001 +0200, Emmanuel Dreyfus wrote:
>Hello
>
>I have a question about data and instruction cache. I remember that except
>for the PowerPC 601, they are distinct on the PowerPC architecture.
>
>How does it works with signal trampolines? The trampoline is treated as data
>when it is copied on the stack , ands hence it fits in the data cache, but
>when we branch to it, processor will look into the instruction cache, not the
>data cache. Hence, if the data cache was not flushed, the processor may
>brnach to a location on the stack where there is nothing yet.
>
>I assume there must be some cache handling somewhere, but where is it in the
>code?

look for the syncicache code.  Basically, you do a isync (possibly
preceded by a sync).
--
Matt Thomas               Internet:   matt@3am-software.com
3am Software Foundry      WWW URL:    http://www.3am-software.com/bio/matt/
Cupertino, CA             Disclaimer: I avow all knowledge of this message