>> now this interesting thing here is that pmap_enter()
>> called from uvm_pagermapin() or ubc_fault() should only ever be overwriting
>> an invalid mapping, never changing one valid mapping to a different one,
>> so it's shouldn't be necessary to flush anything.

I would like to point out it's time for NetBSD to define some sort of
cache manapulation primitive in kernel API area.  It's a p-a-i-n for
NetBSD/mips to cope with R3000 style cache and R4000 style cache at
the same time because upper VM and other kernel machinary have little
knowledge for processor nature of cache machinary and no provision of
accomodation for myriad of cache designs (I'm thinking of hp300).

It was a wise decision IRIX ripped of R3000 product support early.
However, it led SGI guy lose useful knowledge about how R3000
processor behaves.  In retrospective, it looks like MIPS abandoned
R3000 too early before R4000 design and approach gets matured enough.
If it was allowed NetBSD to neglect R4000/R4400 processor support,
world would be plainer than it is.

Tohru Nishimura