On Wed, 17 May 2000, Toru Nishimura wrote:

> Though, I'm not a hardware engineer at all...
>  
> > As long as we're talking pipe dreams...
> >
> >        What about a 'helper' ROM on the daughter card that does any CPU
> > specific setup so that the motherboard ROMS work as-is... The daughter
> > card could also have local SDRAM.
> 
> I looked at 3MIN/MAXINE CPU module closely.  It has 25MHz 3000A/3010A
> made by Performance Semicon (Where dit they go?) One LSI Logic custom
> chip L1A6406 (DC7201C) seems designed and ordered by Digital, probably
> is called CPU ASIC which is hard to be replicated.  On another side
> there is a small AMD chip maybe programmed logic.  ALL other major
> chips seem Moto's SRAM for caches. IOASIC and TC ASIC sit on mother
> board.  Intel N27C20 and S(ignetics?)27C751 are socketed parts,
> possibly reprogrammable and contain REX TC ROM monitor.

	My 25 MHZ modules are the same but the CPU/FPUs are made by
Siemens. 33MHz modules have single CPU/FPU chip (in PGA) and larger ASIC
(LSI LOGIC L1A7301) plus 1.5* the cache of the 25 MHz module (12x
MCM62995AFN versus 8) the 33MHZ module has 128K data/64K instruction cache
so maybe the 25MHz has 64K/64K...
	Looks like (with a quick ohmmeter check) that most if not all
MIPS bus signals go through ASIC to the daughterboard connector...

> 
> >        I guess the hardest part would be re-creating the
> > MIPS-BUS-->TC/MEMORY ASIC. Might be possible to use the old ASIC with a
> > newer processor as long as the CPU BUS was the same (or very similar) and
> > could be slowwed during ASIC accesses...
> 
> Tohru Nishimura
> 

Peter Wallace