For those who are interested in Digital framebuffer hardware design
evolution, here is the list of published documents relating it;

- Writing Fast X Servers for Dumb Color Frame Buffers, DEC WRL Technical
Report TR91/1

This is the very good paper discussing how rendering logics could be
improved without any hardware 'accellerator' logic.  'Must-item' for X
server maintainers and graphics hardware designers.

- A Smart Frame Buffer, DEC WRL Technical Report TR93/1

The authers emphasize the virtue of SFB design.  Rectanler shape
rendering always involves in nested loops, and inner most one contains
complicated pixel manipulations for various BLT ops and alignment
constraints.  SFB _greatly_ reduces the programing burdens by
digesting inner most logics.  The sucesss is derived from the
designers wanted to make 'cfb' (see X distribution) codes simplier.
Indeed, they point SFB enabled X server is smaller than MIT generic
'cfb'.

- Faster Hardware, Smarter Code - Optimazing X for Graphics
Accelerators (found in TriAdd/ directory of gatekeeper, it's not known
when the orignal paper was written.  Supportedly before the
establishment of SFB design)

The auther describes how X server for PX/PXG was improved.  It should
be noted that PX/PXG is pre-X window age hardware and the part of
burdens came from the fact.  Good literature for those who are
involves in match-making between hardware accelerator and popular
software design. 

- A Smart Frame Buffer, presentation in Hot Chips 1992.

Fine briefing of SFB design philosophy.

- The Smart Frame Buffer Goes Hollywood: 3D and TV, presentation in
Hot Chips 1994

Technical briefing of SFB+ chip.  SFB+ design was available as a
commercial product for PCI video card (TGA) and TURBOchannel option
card PMAGD for DEC3000.

- DECchip 21030 PCI Graphics Accelerator Reference Manual, EC-N0683-72
- DECchip 21130 PCI Integrated Graphics and Video Accelerator Technical
  Reference Manual, EC-QD2QC-TE

Technical reference for those who make codes for TGA/PCI , also nice
for PMAGD programming.

- PixelVision Architecture, DEC SRC-1998-1

123 page document of PixelVision hardware.

- Neon: A (Big) (Fast) Single-Chip 3D Workstation Graphics Accelerator
  DEC WRL TR98/1, and a presentation of Hot Chips 1998

'A 256-bit Graphics Accelerator', which well competes to SGI Octane.
It's not known it's ever available as a commertial product. 

- PowerStorm 4DT: A High Performance Graphics Software Architecture,
  Digital Technical Journal Volume 9, Number 4

'An OpenGL engine' for Digital UNIX and Alpha Windows NT.

Tohru Nishimura
Nara Institute of Science and Technology