My vague memory whispers me 'k0/k1 contents might be trashed under certain
circumstances, e.g., after calling mt*/mf* for mulhi/mullo'.  I can not
remember where I got the knowledge, and I might be wrong.

Tohru Nishimura

>> I'm wondering whether there is a constraint in k0/k1 register contents
>> while manipulating mulhi/mullo registers via mt*/mf* operations.  Can
>> someone assert/deny my suspiction?
>
> I'm not sure I understand the question, but what I remember about k0/k1 is
> that O/S's are free to trash them during interrupts and so user code should
> not expect to use them for anything, ever.