Subject: Re: k0/k1 register while mulhi/mullo manipulation
To: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
From: Todd Whitesel <toddpw@best.com>
List: port-pmax
Date: 02/23/2000 02:53:56
> I'm wondering whether there is a constraint in k0/k1 register contents
> while manipulating mulhi/mullo registers via mt*/mf* operations.  Can
> someone assert/deny my suspiction?

I'm not sure I understand the question, but what I remember about k0/k1 is
that O/S's are free to trash them during interrupts and so user code should
not expect to use them for anything, ever.

Todd Whitesel
toddpw @ best.com