In message <Pine.BSF.4.10.9905111442410.12734-100000@freeby.mesanet.com>,
Peter W allace writes:

>> FSVO "fine".  It has a 1-byte FIFO.  Your DECstation will *not* receive data
>> above 38,400 and do anything else useful.

Thor, why on earth do you say that? There's, what, a 3-byte fifo, and
57600 bits/sec at 1 start bit and 1 stop bit comes out under 2k
interrupts/sec.  Not at all outrageous for a 25Mhz r3000.

Better pdma would be nice, but so would output DMA...


>Actually it has a 3 byte FIFO and DMA capability if supported by the rest
>of the hardware. 

which it is, but we dont have driver support for that.

>Actual speed limitations may have more to do with RS-232
>level shifters (they were never designed for >56K baud or so, only newer
>RS-232 level shifters were designed with 230K baud in mind)

I was never sure if that was the problem I ran into with receive-side
not working above 57600 on a 5000/240, or if it was from clock-divider
weirdness.  I wonder the real cause may be, in part, differences
between genuine Zilog chips and the AMD (or Intel?) parts.