On Fri, 5 Jun 1998 11:43:07 +0900 (JST) 
 nisimura@is.aist-nara.ac.jp (Toru Nishimura) wrote:

 > By manupilating enable/disable bits in IOASIC CSR?
 > 
 > (And I'm wondering how "the new way" can be fit in IOASIC Alphas)

It doesn't need to be:

	(1) All Alpha interrupts come in at a single level, and the
	    interrupt latency isn't an issue on Alphas.

	(2) Alphas don't have SCSI on the IOASIC.

Jason R. Thorpe                                       thorpej@nas.nasa.gov
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