Subject: Re: TLB weirdnesses
To: David Evans <dfevans@bbcr.uwaterloo.ca>
From: Michael L. Hitch <mhitch@lightning.oscs.montana.edu>
List: port-pmax
Date: 04/23/1998 13:48:21
On Apr 23,  2:33pm, David Evans wrote:
>   I've been having problems with this DS3100 dying with a ktlbmiss before
> starting /etc/init so I did some poking today.  On my 2100 (which works) I
> notice that, at this point, there are only two valid TLB entries--the ones for
> the u-area, so I gather.  However, on the 3100 there are *many* entries marked
> as valid.
>   From looking at code in mach_init() from mips/mips/machdep.c, it would appear
> that only the first two TLB entries are ever touched--the rest are left in
> their default state.  Should the PROM monitor normally be invalidating all of
> the entries?

  Take a look at mips_vector_init() - it explicitly flushes the random TLB
entries.

  By the time the kernel gets to starting /sbin/init, there should be quite
a number of valid TLB entries.  All the kernel virtual memory is mapped
using the TLB, and the kernel should have initialized lots of data by that
point.

  What exactly are the ktlbmiss messages?  The message should include the
PC at the time of the exception, the RA [return address] location, and
the bad address.

Michael

-- 
Michael L. Hitch			mhitch@montana.edu
Computer Consultant
Information Technology Center
Montana State University	Bozeman, MT	USA