> It never finishes booting at ~1 ms RTC tick interval.
> Which leads me to conjecture that there's a real problem with
> interrupt latency.

yow.  sounds like it.

> Doesn't the Zilog SCC have three chars worth of buffering?

i believe so.

> But surely the Mac
> port has a respectable driver for the SCC by now? Couldn't we we just
> take it and run?

more likely the SPARC port, or any of the other ports that have 8530
drivers.  but the answer is no, none of them have particularly "good"
drivers.  As chris torek said:

``This chip, by the way, comes from someplace horrible, probably Hell.''

I actually think that a pmax (and alpha 8-) "custom" driver for the
SCC may be in order, given that the IOCTL ASIC has such sexy (though
perhaps inscrutable 8-) support for DMA from the chip...


chris