Hi,

   So if you never found out why SCSI DMA through the ASIC was wedging,
   how did you eventually get it working?

Never did. The asc.c driver cheats and always copies the block to/from
a page aligned 8K (2 page) buffer before/after doing DMA. This way the
ASIC never does more than use the two page addresses loaded into the dma
and dma_next registers before the transfer starts. (It was when the code
serviced the interrupt and loaded the dma_next register while a dma was
in progress that never quite worked.:-)

Of course it would be nice to avoid the memory->memory copy someday:-)
I'll be curious to hear what you find out about flushing the write
buffers, rick.