Subject: Re: args of mips3_clockintr()
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
From: Garrett D'Amore <garrett_damore@tadpole.com>
List: port-mips
Date: 09/10/2006 09:08:35
Izumi Tsutsui wrote:
> garrett_damore@tadpole.com wrote:
>
>   
>>> As noted above, we should set SR_INT_IE bit before calling hardclock()
>>> if all interrupts were enabled (in status) and there is no other
>>> pending interrupt (in ipending).
>>>   
>>>       
>> Hmm.... this sounds like maybe a port that isn't using the separate
>> interrupts for soft interrupts?  Or am I misunderstanding something.
>>
>> I guess I should take a good hard look at hardlock(9) implementation.
>>     
>
> This is mentioned in the Design and Implementation of 4.4BSD.
> Usually hardclock(9) schedules softclock() request, but
> if there is no other interrupts to be handled, hardclock(9)
> just lowers spl(9) to splsoftclock() and calls softclock() directly
> to save overhead of an extra interrupt call for softintr.
> (lines 881-904 in sys/kern/kern_clock)
> ---
> Izumi Tsutsui
>   

Ah, okay.  Well, I guess I should think about this some more.  But if
you and Simon agree, then I'd say go for it.  :-)  Otherwise I'll
contemplate this some more later today/tonight and get back to you.

    -- Garrett

-- 
Garrett D'Amore, Principal Software Engineer
Tadpole Computer / Computing Technologies Division,
General Dynamics C4 Systems
http://www.tadpolecomputer.com/
Phone: 951 325-2134  Fax: 951 325-2191