Subject: Re: blocked interrupts (was CVS commit: src/sys/arch/arc)
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
From: Simon Burge <simonb@wasabisystems.com>
List: port-mips
Date: 11/19/2005 00:29:54
Izumi Tsutsui wrote:

> In article <20051117214050.7104C23403@thoreau.thistledown.com.au>
> simonb@wasabisystems.com wrote:
> 
> > > >	-   if (ipending & INT_MASK_REAL_DEV) == 0,
> > > >	    softnet() and softclock() are handled with all interrupt disabled.
> > > >		-> overblocking, possibly causes missing hardclock()
> > > 
> > > XXX: It seems some other mips ports (algor, evbmips, pmax, sgimips)
> > > XXX: also have the similar problem.
> > 
> > I believe algor, evbmips and pmax get this right.  In these ports,
> > cpu_intr() calls a machine-specific *_iointr(),
> 
> Only if ((ipending & MIPS_INT_MASK_*) != 0) ?
> 
> _clearsoftintr() should set MIPS_SR_INT_IE too?

Ah, the case where we come in to cpu_intr() with only soft interrupts?
Indeed we'll then leave all interrupts disabled while we process the
software interrupts.

Does it make sense to have _clrsoftintr() enable interrupts?  It's not
quite the right name for such a function, but I guess it makes sense
for it to enable interrupts.  I'm not sure whether we should rename it
though (or what to rename it to).


As an aside, it looks like it would make sense to put the prototype for
_clrsoftintr() in <mips/softintr.h>, and remove it from <machine/intr.h>
for those ports that use the MIPS "MI" softintrs.  Do you agree?

Simon.
--
Simon Burge                            <simonb@wasabisystems.com>
NetBSD Support and Service:         http://www.wasabisystems.com/