On Tue, Aug 30, 2005 at 08:22:04PM +0900, Izumi Tsutsui wrote:
> Ok, I've managed to find the problem.
> 
> In the previous MachTLBUpdate(), MIPS_COP_0_TLB_PG_MASK
> is set to zero on creating a new TLB entry.
> On the other hand, TLBMissException() uses the "default"
> MIPS_COP_0_TLB_PG_MASK value for a new TLB entry, but
> there is no point to initialize MIPS_COP_0_TLB_PG_MASK
> register in the kernel. mipsN_TBI*() functions set
> MIPS_COP_0_TLB_PG_MASK to zero, but they restore the
> previous value after updating entries.

ah, ok.  good catch.


> Actually "machine cp0" on ddb prompt on the panic shows
> that the pagemask register is 0x1ff0000. Maybe the EWS4800
> firmware uses 16M pages (at least for framebuffer VRAM),
> and maybe there is no port which uses such value on PROM.
> 
> The attached patch fixes the problem, but I wonder
> which function should initialize the cp0 pagemask reg.
> Is it better to make the default pagemask value zero
> (MIPS3_PG_SIZE_4K) and only some special functions
> (which handle wired TLB entries etc.) should
> save/restore the default pagemask value?

if we can remove the need to save/change/restore the pagemask
in the common cases of creating and invalidating TLB entries,
that would be a nice improvement, yea.

note that even with that change, my mobilepro 880 still doesn't work.
now it hangs even before printing the copyright (but after printing
the mem_cluster stuff).

-Chuck