About R4000 index ops.

Years ago one NetBSD guy enlighten me about the usage of
R4000 index ops.  Here is the description about plain cache
op and index op.

Index op takes a portion of VA ("cache index" bit) to search
target/victim cache line.  The untold consequence of VIPT
cache is it's hard to manupulate pages which belong to other
universe.  Processor has VA->PA mapping of a current
process given any moment.  TLB will act as a central authority
about VA->PA and cache maninuplation.  ASID plays magic
there.  Plain cache ops consults TLB to pick the target cache
line.  It can work for current VA->PA mapping, but not possible
to determine PA of other processes.  Index ops are invented
to handle the case.

I have stories about MIPS TLB/cache.  Talk later.
- ASID management
- linear PTE
- defered ASID bump, TLB shoot down
- defered cache invalidation, cache line shoot down
- ...

Toru Nishimura/ALKYL Technology