Subject: Re: CVS commit: src/sys/arch/mips
To: None <port-mips@netbsd.org>
From: Toru Nishimura <locore64@alkyltechnology.com>
List: port-mips
Date: 03/07/2005 02:08:59
Izumi Tsutsui asked;

> Obviously pmap_zero_page(9) and pmap_copy_page(9) do,
> but are there any other functions?
> Besides, could options MIPS3_NO_PV_UNCACHED
> (which seems not so good for me though) prevent it?

PV list is used to share a single page between multiple VA
pages, right?  If so, all VA must agree each other for their
"VA index".  In the case when such the VA disagree touching
"conflicting VA range" makes virtual alias.  The solution is the
same.  Do every effort to choose matching VA all the time.

> we should just
> invalidate cache for such KSEG0 VA before freeing
> them by uvm_pagefree(9)?

VIPT cache needs no invalidation for that case.

> Does this mean we have to make some changes in MI UVM?

I'm afraid we have to do so.

1. R4000 TLB is peculiar.   Single TLB entry can manage a pair
of pages.  So, 8KB granularity is a prefered size to control VA and
the page size happens to be a half, 4KB.
2. When assigning PA to VA, "index" must match each other
in order to make sure cache line will be stored in predetermined
place.
3. If 2nd or more VA is going to be attached to an existing page
for sharing purpose, the VA must be choosen according to "index."

Toru Nishimura/ALKYL Technology