>> Curt's cache/SMP book is the authority.
>
> Hehe, The Curt's book always helps me. ;-) (for bus_dma, for mips etc. etc.)

Curt Schimmel book and Uresh Vahalia book are the must-read for every
computer engineer.  Don't argue modern processors before understand them.

Virtual alias and VCE are badly misunderstood.

Q. why virtual alias can happen in R4000 VIPT cache?
A. because NetBSD/mips pmap.c produces it.  It's plain wrong.
Q. how we can avoid virtual alias for R4000 VIPT cache?
Use a special rule to bind VA and PA to prevent virtual alias.
Q. what is the rule?
A. Virtual alias is the sitation where a single cache line content
is stored in two or more cache line stores.  This would happen
when a single page have multiple VA addresses which disagree
each other for cache line index.  The rule is to choose PA which
does match VA index.  The intent is to make no anbiguity for
every single cache line, i.e., to store single cache line in
predetermined cache line store.  This strategy removes virtual
alias completely.

VCE is an academic subject.  It only makes sense for L2 equipped
R4000.  No other MIPS processor is designed to post VCE.  The
point is the right solution is to make sure no virtual alias happen. 

Toru Nishimura/ALKYL Technology