> Modified Files:
> 	src/sys/arch/mips/include: cache.h
> 	src/sys/arch/mips/mips: cache.c pmap.c
> 
> Log Message:
> Add a hint variable (mips_sdcache_forceinv, explicitly initialized to zero)
> that tells pmap_zero_page() and pmap_copy_page() to unconditionally invalidate
> pages for r5k-class CPUs with secondary cache.

Hmm. The variable should be like "no VCE support" or
"needs software support to handle virtual alias" etc.
Please see my recent patch:
http://mail-index.netbsd.org/port-mips/2005/02/26/0007.html

> Modified Files:
> 	src/sys/arch/sgimips/sgimips: machdep.c
> 
> Log Message:
> Set mips_sdcache_forceinv to 1 for r5k processors.

This should be set in cache.c because it's not machine dependent,
I think.

Anyway, I'm afraid this is not enough to solve r5k issue, though.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp