Subject: pmap_prefer and n-way cache (Re: CVS commit: src/sys/arch/mips/include)
To: None <port-mips@netbsd.org>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-mips
Date: 01/19/2005 00:17:24
In article <20050117142026.D875C2356B@thoreau.thistledown.com.au>
simonb@wasabisystems.com wrote:

> > > Now that countless UVM bugs have been fixed and the MIPS pmap_prefer()
> > > can deal with topdown for CPUs that need to deal with cache alias
> > > conflicts (thanks Andrew Brown!), enable "topdown" memory allocation by
> > > default.
> > 
> > BTW, can pmap_prefer() handle 2-way (and more) associative VA cache?
> > On discussion with Soda, he said it should be handled by upper VM layer.
> 
> I'm not sure to be honest.
> 
> Maybe if the prefer mask was set (as "(d$ size / number-of-ways) - 1"?)
> to take in to account the number of ways?  It might be informative to
> instrument (with event counters) where the mips_cache_indexof() macro
> is used to check this.

Such mask value would create the same index for virtual addresses
which are the same physical address, but n-way set-associative cache
can contain both data of such VAs in the same index, so it won't help
to avoid virtual alias. (I could be wrong though)
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp