"Toru Nishimura" wrote:

> I added 4 figures; TX4955, TX4925, TX3927 and Vr4300.
> 
>     http://www.alkyltechnology.com/files/MIPScachefigure2.pdf
> 
> Please note that while the two TX49 share the same CPU core, their
> cache characteristic acutely differ each other; the former is VIPT an
> the latter is "effective-PIPT."  Au1000 and IDT32438 work same as
> TX4925.

Note that from NetBSD's point of view, the Au1000 cache is fully
coherent, even when fetching in to the instruction cache.  Thus
there is no need for any specific cache handling at all.

Simon.
--
Simon Burge                            <simonb@wasabisystems.com>
NetBSD Support and Service:         http://www.wasabisystems.com/